IEEE Design & Test of Computers, Volume 10

Volume 10, Number 1, January-March 1993

• Conference Reports. 2-3

• Book Review. 4-5

• Pinaki Mazumder, John P. Hayes: Guest Editor's Introduction: Testing and Improving the Testability of Multimegabit Memories. 6-7
• A. J. van de Goor:
  Using March Tests to Test SRAMs. 8-14
  
• Michihiro Inoue, Toshio Yamada, Atsushi Fujiwara:
  A New Testing Acceleration Chip for Low-Cost Memory Tests. 15-19
  

• Prathima Agrawal, Vishwani D. Agrawal, Sharad C. Seth:
  Generating Tests for Delay Faults in Nonscan Circuits. 20-28
  
• Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri:
  Estimating the Complexity of Synthesized Designs from FSM Specifications. 30-35
  
• B. Naveen, K. S. Raghunathan:
  An Automatic Netlist-to-Schematic Generator. 36-41
  

• Peter C. Maxwell, Robert C. Aitken:
  Test Sets and Reject Rates: All Fault Coverages are Not Created Equal. 42-51
  
• William R. Simpson, John W. Sheppard:
  Fault Isolation in an Integrated Diagnostic Environment. 52-66
  
• Karl R. Umstadter, Don L. Millard, Robert C. Block:
  Applications of a Laser-Induced Plasma Pathway to Testing of Electronic Modules. 67-72
  
• Vishwani D. Agrawal, Charles R. Kime, Kewal K. Saluja:
  A Tutorial on Built-in Self-Test. I. Principles. 73-82
  
• A D&T Roundtable. 83-91

• TTTC Newsletter. 92-93

• DATC Newsletter. 94-95

Volume 10, Number 2, April-June 1993

• News. 2-3

• Conference Reports. 4-5

• Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikoshi, Katsuhiro Suma, Kazuyasu Fujishima:
  Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters. 6-12
  
• Samir Naik, Frank Agricola, Wojciech Maly:
  Failure Analysis of High-Density CMOS SRAMs: Using Realistic Defect Modeling and I/Sub DDQ/ Testing. 13-23
  
• Robert P. Treuer, Vinod K. Agarwal:
  Built-In Self-Diagnosis for Repairable Embedded RAMs. 24-33
  
• Jos van Sas, Francky Catthoor, Hugo De Man:
  Test Algorithms for Double-Buffered Random Access and Pointer-Addressed Memories. 34-44
  

• Steve Vinoski:
  RISE++: A Symbolic Environment for Scan-Based Testing. 56-68
  
• Vishwani D. Agrawal, Charles R. Kime, Kewal K. Saluja:
  A Tutorial on Built-In Self-Test, Part 2: Applications. 69-77
  
• John W. Sheppard, William R. Simpson:
  Performing Effective Fault Isolation in Integrated Diagnostics. 78-90
  

• 1994 Editorial Calendar. 55-

• New Products. 91-

• TTTC Newsletter. 92-93

• DATC Newsletter. 94-95

Volume 10, Number 3, July-September 1993

• Conference Reports. 2-

• News. 4-

• Wayne Wolf: Guest Editor's Introduction: Hardware-Software Codesign. 5-
• Donald E. Thomas, Jay K. Adams, Herman Schmit:
  A Model and Methodology for Hardware-Software Codesign. 6-15
  
• Asawaree Kalavade, Edward A. Lee:
  A Hardware-Software Codesign Methodology for DSP Applications. 16-28
  
• Rajesh K. Gupta, Giovanni De Micheli:
  Hardware-Software Cosynthesis for Digital Systems. 29-41
  
• Maximo H. Salinas, Barry W. Johnson, James H. Aylor:
  Implementation-Independent Model of an Instruction Set Architecture in VHDL. 42-54
  
• Asim Smailagic, Daniel P. Siewiorek:
  A Case Study in Embedded-System Design: The VuMan 2 Wearable Computer. 56-67
  

• Warren H. Debany Jr., Kevin A. Kwiat, Sami A. Al-Arian:
  A Method for Consistent Fault Coverage Reporting. 68-79
  
• A D&T Roundtable. 80-86
• Franc Brglez: A D&T Special Report on ACM/SIGDA Design Automation Benchmarks: Catalyst or Anathema? 87-91

• New Products. 92-

• DATC Newsletter. 93-

• TTTC Newsletter. 94-95

Volume 10, Number 4, October-December 1993

• News. 4-5, 90-91

• Book Review. 6, 96

• Wayne Wei-Ming Dai, Kwang-Ting (Tim) Cheng: Guest Editor's Introduction. 7-
• Robert C. Frye, King L. Tai, Maureen Y. Lau, Thaddeus J. Gabara:
  Trends in Silicon-On-Silicon Multichip Modules. 8-17
  
• David Staepelaere, Jeffrey Jue, Tal Dayan, Wayne Wei-Ming Dai:
  SURF: Rubber-Band Routing System for Multichip Modules. 18-26
  
• Jun Dong Cho, Majid Sarrafzadeh, Mysore Sriram, Sung-Mo Kang:
  High-Performance MCM Routing. 27-37
  
• Ting-Ting Y. Lin, Huoy-Yu Liou:
  A New Framework for Designing: Built-in Test Multichip Modules with Pipelined Test Strategy. 38-51
  

• Hassan Rajaei, Rassul Ayani:
  Design Issues in Parallel Simulation Languages. 52-63
  
• Rolf Ernst, Jörg Henkel, Thomas Benner:
  Hardware-Software Cosynthesis for Microcontrollers. 64-75
  

• Fadi N. Sibai:
  A Fault-Tolerant Digital Artificial Neuron. 76-82
  
• 1993 Annual Index: Complete author and subject listing. 83-87

• New Products. 88-90

• DATC Newsletter. 92-

• TTTC Newsletter. 93-95

Last update Sat May 18 16:14:48 2013 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page