IEEE Design & Test of Computers, Volume 12

Volume 12, Number 1, 1995

• EIC Message. 2-4

• Ajit M. Prabhu: Managing your EDA investments. 5-7, 89-90

• Call for Articles. 7-

• News. 8-9

• Conference Reports. 10-11, 83-84

• Vinod K. Agarwal: VTS 1994 Panel Report on BIST for Consumer Products. 12-

• Tam-Anh Chu, Rabindra K. Roy: Guest Editors' Introduction: More Practical Asynchronous Design. 13-
• Victor Varshavsky, Vyacheslav Marakhovsky, Vadim V. Smolensky:
  Designing Self-Timed Devices Using the Finite Automaton Model. 14-23
  
• Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger:
  Automatic Verification of Asynchronous Circuits. 24-31
  
• Call for Articles. 31-
• Alexandre Yakovlev, Albert Koelmans, Luciano Lavagno:
  High-Level Modeling and Design of Asynchronous Interface Logic. 32-40
  

• Shoab Ahmed Khan, Vijay K. Madisetti:
  System Partitioning of MCMs for Low Power. 41-52
  
• Daniel D. Gajski, Frank Vahid:
  Specification and Design of Embedded Hardware-Software Systems. 53-67
  
• Yuejian Wu, André Ivanov:
  Reducing Hardware with Fuzzy Multiple Signature Analysis. 68-74
  
• A D&T Roundtable: Test Benchmarking. 75-82

• Author Guidelines: IEEE Design & Test of Computers. 85-86

• New Products. 87-89

• DATC Newsletter. 91-92

• Test Technology TC Newsletter. 93-95

Volume 12, Number 2, 1995

• Ajit M. Prabhu: Management Perspectives in EDA. 3-4

• N. Ranganathan, Sharad C. Seth: Conference Reports. 5, 81

• Ben Bennetts: Guest Editor's Introduction. 6-7
• Robert C. Aitken:
  An Overview of Test Synthesis Tools. 8-15
  
• Henry Cox:
  Synthesizing Circuits with Implicit Testability Constraints. 16-23
  
• Kwang-Ting (Tim) Cheng:
  Single-Clock Partial Scan. 24-31
  
• Call For Articles. 31-
• Thomas E. Marchok, Aiman H. El-Maleh, Janusz Rajski, Wojciech Maly:
  Testability Implications of Performance-Driven Logic Synthesis. 32-39
  

• Charles F. Hawkins, Jerry M. Soden: IDDQ Design and Test Advantages Propel Industry. 40-41
• Don Douglas Josephson, Mark Storey, Daniel D. Dixon:
  Microprocessor IDDQ Testing: A Case Study. 42-52
  
• Mick Tegethoff, Kenneth P. Parker:
  IEEE Std 1149.1: Where Are We? Where From Here? 53-59
  
• Robert A. Walker, Samit Chaudhuri:
  Introduction to the Scheduling Problem. 60-69
  
• Mustapha Slamani, Bozena Kaminska:
  Multifrequency Analysis of Faults in Analog Circuits. 70-80
  

• Luc J. M. Claesen: ED&TC 1995: Simulation versus formal verification. 82-

• News. 83-

• Joe Damore: Design Automation Technical Committee Newsletter. 84-

• Test Technology TC Newsletter. 85-87

Volume 12, Number 3, 1995

• R. I. Campbell: Panel Summaries. 4-

• Ajit M. Prabhu: The EDA Business Model Dialogue Part 1. 6-7, 106-107

• News. 8-

• New Products. 9, 104-105

• Conference Reports. 10-11, 103

• Teruhiko Yamada: Accelerating the Pace of R&D in Asia. 12-13
• Hsing-Chung Liang, Chung-Len Lee, Jwu E. Chen:
  Identifying Untestable Faults in Sequential Circuits. 14-23
  
• Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar:
  Concurrent Error Detection Using Monitoring Machines. 24-32
  
• Yoshiaki Kakuda, Hideki Yukitomo, Shinji Kusumoto, Tohru Kikuno:
  Localizing Multiple Faults in a Protocol Implementation. 34-42
  
• Nobuhiro Yanagida, Hiroshi Takahashi, Yuzo Takamatsu:
  Multiple Fault Diagnosis by Sensitizing Input Pairs. 44-52
  

• Keith Baker, Alan Hales:
  Plug-and-Play IDDQ Testing for Test Fixtures. 53-61
  
• Kenneth M. Wallquist:
  Achieving IDDQ/ISSQ Production Testing with QuiC-Mon. 62-69
  
• Nand Kumar, Srinivas Katkoori, Leo Rader, Ranga Vemuri:
  Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems. 70-84
  
• Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina:
  Industrial BIST of Embedded RAMs. 86-95
  
• A D&T Roundtable: The Practical Application of Formal Verification. 96-102

• Design Automation Technical Committee Newsletter. 108-109

• Test Technology TC Newsletter. 110-111

Volume 12, Number 4, 1995

• News. 2-3

• Ajit M. Prabhu: The EDA Business Model Dialogue Part 2. 4-5, 98-99

• Frederick L. Kitson: Guest Editor's Introduction: Multimedia Drives Changes. 6-7
• Frederick L. Kitson, Vasudev Bhaskaran, Devendra Kalra:
  Transitioning Desktops to Set Tops. 8-17
  
• Jihong Kim, Yongmin Kim:
  Simulating Multimedia Systems with MVPSIM. 18-27
  
• Christian J. Van Den Branden Lambrecht, Vasudev Bhaskaran, Al Kovalick, Murat Kunt:
  Automatically Assessing MPEG Coding Fidelity. 28-33
  
• David K. Fibush:
  Testing Multimedia Transmission Systems. 34-44
  

• Manoj Sachdev:
  Testing Defects in Scan Chains. 45-51
  
• Jing-Yang Jou, Kwang-Ting (Tim) Cheng:
  Timing-Driven Partial Scan. 52-59
  
• Eugeni Isern, Joan Figueras:
  IDDQ Test and Diagnosis of CMOS Circuits. 60-67
  
• Randall Mcree:
  Testing and Diagnosing Managed Networks. 68-80
  
• Bulent I. Dervisoglu:
  Special Report: Shared-I/O Scan Test. 81-83
  
• A D&T Roundtable: Low-Power Design. 84-90
• IEEE Design & Test of Computers Annual Index, Volume 12. 91-94

• Sreejit Chakravarty, Ramalingam Sridhar, Shambhu J. Upadhyaya, Yervant Zorian, Gil Philips, Bozena Kaminska, Bernard Courtois: Conference Reports. 95-97

• Design Automation Technical Committee Newsletter. 100-101

• Test Technology TC Newsletter. 102-103