Volume 17,
Number 1,
January-March 2000
EIC Message
News
Article
Feature
- Fadi J. Kurdahi, Nader Bagherzadeh, Peter Athanas, Jose L. Muñoz:
Guest Editors' Introduction: Configurable Computing.
17-19
- Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin:
Designing and Debugging Custom Computing Applications.
20-28
- Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey:
Dependable Computing and Online Testing in Adaptive and Configurable Systems.
29-41
- Bingxiong Xu, David H. Albonesi:
Runtime Reconfiguration Techniques for Efficient General-Purpose Computation.
42-52
- Daler N. Rakhmatov, Sarma B. K. Vrudhula, Thomas J. Brown, Ajay Nagarandal:
Adaptive Multiuser Online Reconfigurable Engine.
53-67
- Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh:
Fast Template Placement for Reconfigurable Computing Systems.
68-83
- Sergio López-Buedo, Javier Garrido, Eduardo I. Boemo:
Thermal Testing on Reconfigurable Computers.
84-91
Special Feature
- Hardware-Software Codesign.
92-99
Standards
- Mukund Modi:
TTTC Reports on Recent Standards Activities.
100-101
Panel Summaries
Conference Reports
- Conference Reports.
106-107
TTTC Newsletter
DATC Newsletter
The Last Byte
Volume 17,
Number 2,
April-June 2000
EIC Message
News
Feature
- Donatella Sciuto:
Guest Editor's Introduction: Design Tools for Embedded Systems.
11-13
- Marco Sgroi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
Formal Models for Embedded System Design.
14-27
- Frank Slomka, Matthias Dörfel, Ralf Münzenberger, Richard Hofmann:
Hardware/Software Codesign and Rapid Prototyping of Embedded Systems.
28-38
- Margarida F. Jacome, Gustavo de Veciana:
Design Challenges for New Application-Specific Processors.
40-50
- Michael Eisenring, Lothar Thiele, Eckart Zitzler:
Conflicting Criteria in Embedded System Design.
51-59
- Alberto Allara, Massimo Bombana, William Fornaciari, Fabio Salice:
A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller.
60-72
- Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino:
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation.
74-85
Special Feature
Conference Reports
- Conference Reports.
127-135
Panel Summaries
DATC Newsletter
TTTC Newsletter
Standards
- Mukund Modi:
SCC20 Reports on Recent Standards Activities.
142-143
The Last Byte
- In the Licensing Dungeon: CAD by the Minute.
143-144
Volume 17,
Number 3,
July-September 2000
From the EIC
News
Feature
- Scott Davidson, Justin E. Harlow III:
Guest Editors' Introduction: Benchmarking for Design and Test.
12-14
- Justin E. Harlow III:
Overview of Popular Benchmark Sets.
15-17
- Rohit Kapur, Cy Hay, Thomas W. Williams:
The Mutating Metric for Benchmarking Test.
18-21
- Giulio Gorla, Eduard Moser, Wolfgang Nebel, Eugenio Villar:
System Specification Experiments on a Common Benchmark.
22-32
- Chouki Aktouf, Hérvé Fleury, Chantal Robach:
Inserting Scan at the Behavioral Level.
34-42
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero:
RT-Level ITC'99 Benchmarks and First ATPG Results.
44-53
- Luis Basto:
First Results of ITC'99 Benchmark Circuits.
54-59
- Sujit Dey, Debashis Panigrahi, Li Chen, Clark N. Taylor, Krishna Sekar, Pablo Sanchez:
Using a Soft Core in a SoC Design: Experiences with picoJava.
60-71
Special Feature
- Chien-Nan Jimmy Liu, Jing-Yang Jou:
An Automatic Controller Extractor for HDL Descriptions at the RTL.
72-77
- Axel Jantsch, Shashi Kumar, Ahmed Hemani:
A Metamodel for Studying Concepts in Electronic System Design.
78-85
- Rolf Clauberg, Peter Buchmann, Andreas Herkersdorf, David J. Webb:
Design Methodology for a Large Communication Chip.
86-94
- Mauro Bertacchi, Alessandro De Gloria, Daniele Grosso, Mauro Olivieri:
Semicustom Design of an IEEE 1394-Compliant Reusable IC Core.
95-105
- Pramodchandran N. Variyam, Abhijit Chatterjee:
Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling.
106-115
- Seung H. Hwang, Gwan S. Choi:
A Reliability Testing Environment for Off-the-Shelf Memory Subsystems.
116-124
- A D&T Roundtable: Test Resource Partitioning.
126-132
Panel Summaries
Standards
- Mukund Modi:
TTTC Reports on Recent Standards Activities.
136-137
DATC Newsletter
TTTC Newsletter
The Last Byte
- Franc Brglez:
The Scientific Method and Design and Test.
142-144
Volume 17,
Number 4,
October-December 2000
From the EIC
- D&T Elevated to Bimonthly.
3-
Feature
- Magdy S. Abadir, Sumit Dasgupta:
Guest Editors' Introduction: Microprocessor Test and Verification.
4-5
- Wei-Cheng Lai, Angela Krstic, Kwang-Ting (Tim) Cheng:
Functionally Testable Path Delay Faults on a Microprocessor.
6-14
- Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian:
Power-/Energy Efficient BIST Schemes for Processor Data Paths.
15-28
- Alfred L. Crouch, Michael Mateja, Teresa L. McLaurin, John C. Potter, Dat Tran:
Test Development for a Third-Version ColdFire Microprocessor.
29-37
- Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen:
Effectiveness of Microarchitecture Test Program Generation.
38-49
- David Van Campenhout, Trevor N. Mudge, John P. Hayes:
Collection and Analysis of Microprocessor Design Errors.
51-60
- Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham:
Validating PowerPC Microprocessor Custom Memories.
61-76
- Hemant G. Rotithor:
Postsilicon Validation Methodology for Microprocessors.
77-88
Special Feature
Standards
Panel Summaries
TTTC Newsletter
DATC Newsletter
Annual Index
- IEEE Design & Test of Computers 2000 Annual Index, Volume 17.
109-117
The Last Byte
Copyright © Wed Nov 25 19:07:54 2009
by Michael Ley (ley@uni-trier.de)
