IEEE Design & Test of Computers, Volume 26

Volume 26, Number 1, January/February 2009

• Erik Jan Marinissen, Yervant Zorian:
  Guest Editors' Introduction: The Status of IEEE Std 1500. 6-7
  
• Erik Jan Marinissen, Yervant Zorian:
  IEEE Std 1500 Enables Modular SoC Testing. 8-17
  
• Benoit Nadeau-Dostie, Saman Adham, Russ Abbott:
  Improved Core Isolation and Access for Hierarchical Embedded Test. 18-25
  
• Laung-Terng Wang, Ravi Apte, Shianling Wu, Boryau Sheu, Wen-Ben Jone, Jianghao Guo, Kuen-Jong Lee, Wei-Shin Wang, Xiaoqing Wen, Hao-Jan Chao, Jinsong Liu, Yanlong Niu, Yi-Chih Sung, Chi-Chun Wang, Fangfang Li:
  Turbo1500: Core-Based Design for Test and Diagnosis. 26-35
  
• Rohit Kapur, Paul Reuter, Sandeep Bhatia, Brion L. Keller:
  CTL and Its Usage in the EDA Industry. 36-43
  
• Teresa L. McLaurin, Stylianos Diamantidis, Irakis Diamantidis:
  The ARM Cortex-A8 Microprocessor IEEE Std 1500 Wrapper. 44-51
  
• Kedarnath J. Balakrishnan, Grady Giles, James Wingfield:
  Test Access Mechanism in the Quad-Core AMD Opteron Microprocessor. 52-59
  
• Lucia Costas-Perez, Juan J. Rodríguez-Andina:
  Algorithmic Concurrent Error Detection in Complex Digital-Processing Systems. 60-67
  
• Wenjing Rao, Alex Orailoglu, Ramesh Karri:
  Logic Mapping in Crossbar-Based Nanoarchitectures. 68-77
  
• Timothée Levi, Jean Tomas, Noëlle Lewis, Pascal Fouillat:
  A CMOS Resizing Methodology for Analog Circuits. 78-87
  
• Gadi Singer, Rajesh Galivanche, Srinivas Patil, Mike Tripp:
  The Challenges of Nanotechnology and Gigacomplexity. 88-93
  
• Scott Davidson:
  A second course on testing [review of System on Chip Test Architectures (Wang, L.-T et al., Eds.; 2007)]. 98-101
  
• Miron Abramovici, Al Crouch:
  We need more standards like IEEE 1500. 104
  

Volume 26, Number 2, March/April 2009

• Yervant Zorian:
  Guest Editor's Introduction: Examples of Management Decision Criteria. 6-7
  
• Brad Beavers:
  The Story behind the Intel Atom Processor Success. 8-13
  
• Andrew Chang:
  Case Study of a 65-nm SoC Design. 14-19
  
• Jean-Pierre Schoellkopf, Philippe Magarshack:
  Low-Power Design Solutions forWireless Multimedia SoCs. 20-29
  
• Manuel d'Abreu:
  From Specification to High-Volume Production. 30-33
  
• Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco:
  Incremental Verification with Error Detection, Diagnosis, and Visualization. 34-43
  
• Wei Zhang:
  Computing and Minimizing Cache Vulnerability to Transient Errors. 44-51
  
• Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Danilo Ravotto, Matteo Sonza Reorda:
  Test Program Generation for Communication Peripherals in Processor-Based SoC Devices. 52-63
  
• Li-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu:
  Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories. 64-73
  
• Grant Martin:
  Processor Stew (review of Processor Description Languages by P. Mishra and N. Dutt, Eds.; 2008) [Book reviews]. 76-77
  
• Peggy Aycinena:
  Technical management: Best shaken, not stirred [The Last Byte]. 84