IEEE Design & Test of Computers, Volume 8

Volume 8, Number 1, January-March 1991

• News. 2-5

• R. A. Sprague, K. J. Singh, R. T. Wood:
  Concurrent Engineering in Product Development. 6-13
  
• Rolf Ernst, Jayaram Bhasker:
  Simulation-Based Verification for High-Level Synthesis. 14-20
  
• Brion L. Keller, David P. Carlson, William Maloney:
  The Compiled Logic Simulator. 21-34
  
• Wayne Wolf:
  Object Programming for CAD. 35-42
  
• Raul Camposano, L. F. Saunders, R. M. Tabet:
  VHDL as Input for High-Level Synthesis. 43-49
  
• Mehrdad Bidjan-Irani:
  A Rule-Based Design-for-Testability Rule Checker. 50-57
  
• Vinod Chandra, M. R. Verma:
  A Fail-Safe Interlocking System for Railways. 58-66
  
• Joachim Roos:
  Designing a Real-Time Coprocessor for Ada Tasking. 67-79
  
• A D&T Roundtable: ASIC Alternatives for System Design. 80-90

• TTTC Newsletter. 91-93

• Book Review. 92-93

• Conference Reports. 94-95

• Product Review. 96-97

• DATC Newsletter. 102-103

Volume 8, Number 2, April-June 1991

• News. 2-3, 103

• Stephen Walters:
  Computer-Aided Prototyping for ASIC-Based Systems. 4-10
  
• Richard I. Hartley, Kenneth Welles II, Michael Hartman, Abhijit Chatterjee, Paul Delano, Barbara Molnar, Colin Rafferty:
  A Rapid-Prototyping Environment for Digital-Signal Processors. 11-25
  
• David G. Boyer, Robert R. Cordell:
  Rapid Prototyping of High-Speed Communications Chips. 27-39
  
• Jan M. Rabaey, C. Chu, Phu Hoang, Miodrag Potkonjak:
  Fast Prototyping of Datapath-Intensive Architectures. 40-51
  
• Marc Engels, Rudy Lauwereins, J. A. Peperstraete:
  Rapid Prototyping for DSP Systems with Multiprocessors. 52-62
  
• Dilip K. Bhavsar:
  Testing Interconnections to Static RAMs. 63-71
  
• Elisabeth Auth, Michael H. Schulz:
  A Test-Pattern-Generation Algorithm for Sequential Circuits. 72-86
  
• A D&T Roundtable- Six Sigma: Moving Towards Perfect Products. 88-99

• Book Review. 100-102

• DATC Newsletter. 108-109

• TTTC Newsletter. 110-111

Volume 8, Number 3, July-September 1991

• News. 2-4, 9

• Andrew J. Graham: The DAD Reamework Interactive. 12-15
• William R. Simpson, John W. Sheppard:
  System Complexity and Integrated Diagnostics. 16-30
  
• Paul S. Levy:
  Designing in Power-Down Test Circuits. 31-35
  
• G. Antonin, H.-D. Oberle, Jochen Kolzer:
  Electrical Characterization of Megabit DRAMs, Part 1: External Testing. 36-43
  
• Bjorn Dahlberg:
  Increasing Test Accuracy by Varying Driver Slew Rate. 44-48
  
• Rajiv Gupta, Rajagopalan Srinivasan, Melvin A. Breuer:
  Reorganizing Circuits to Aid Testability. 49-57
  
• Prawat Nagvajara, Mark G. Karpovsky, Lev B. Levitin:
  Pseudorandom Testing for Boundary-Scan Design with Built-In Self-Test. 58-65
  
• A D&T Roundtable: Design for Manufacturability. 66-76

• Conference Reports. 78-84

• Product Review. 86-

• Book Review. 90-91

• TTTC Newsletter. 92-93

• DATC Newsletter. 94-95

Volume 8, Number 4, October-December 1991

• Editor-in-Chief's Message. 2-3

• Disaster Recovery Centers. 4-5

• Karlheinz Hafner, Hartmut C. Ritter, Thomas M. Schwair, Stefan Wallstab, Michael Deppermann, Jürgen Gessner, Stefan Koesters, Wolf-Dietrich Moeller, Gerd Sandweg:
  Design and Test of an Integrated Cryptochip. 6-17
  
• David A. Fechser:
  A Methodology for Debugging ASIC Prototypes in the Field. 18-23
  
• John W. Sheppard, William R. Simpson:
  A Mathematical Model for Integrated Diagnostics. 25-38
  
• Jochen Kolzer, Johann Otto:
  Electrical Characterization of Megabit DRAMs, Part 2: Internal Testing. 39-51
  
• Richard Absher:
  Test Engineering Education is Rational, Feasible, and Relevant. 52-62
  
• I. D. Dear, Chryssa Dislis, Anthony P. Ambler, J. H. Dick:
  Economic Effects in Design and Test. 64-77
  
• 1991 Annual Index. 78-81

• Book Review. 82-84

• Conference Reports. 84-86

• Direct Access Network. 87-

• TTTC Newsletter. 92-93

• DATC Newsletter. 94-95