Volume 4, Number 1, February 1993
- Vishwani D. Agrawal:
- Srinivas Devadas, Petra Michel:
- Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
An approach to sequential circuit diagnosis based on formal verification techniques.
- Hyunwoo Cho, Seh-Woong Jeong, Fabio Somenzi, Carl Pixley:
Synchronizing sequences and symbolic traversal techniques in test generation.
- Margot Karam, Gabriele Saucier:
Functional versus random test generation for sequential circuits.
- Johannes Steensma, Werner Geurts, Francky Catthoor, Hugo De Man:
Testability analysis in high level data path synthesis.
- Srimat T. Chakradhar, Suman Kanjilal, Vishwani D. Agrawal:
Finite state machine synthesis with fault tolerant test function.
- Sen-Pin Lin, Charles Njinda, Melvin A. Breuer:
Generating a family of testable designs using the BILBO methodology.
- Srinivas Devadas, Kurt Keutzer, Sharad Malik:
A synthesis-based test generation and compaction algorithm for multifaults.
- Bernhard Eschermann:
Enhancing on-line testability during synthesis.
Volume 4, Number 2, May 1993
Volume 4, Number 3, August 1993
- Vishwani D. Agrawal:
- Charles E. Stroud, Ahmed E. Barbour:
Testability and test generation for majority voting fault-tolerant circuits.
- Chao Feng, Jon C. Muzio, Fabrizio Lombardi:
On the testability of array structures for FFT computation.
- Zaifu Zhang, Robert D. McLeod, Witold Pedrycz:
A neural network algorithm for testing stuck-open faults in CMOS combinational circuits.
- El Mostapha Aboulhamid, Younès Karkouri, Eduard Cerny:
On the generation of test patterns for multiple faults.
- Byung S. So, Charles R. Kime:
A fault simulation method: Parallel pattern critical path tracing.
- Egor S. Sogomonyan, Michael Gössel:
Design of self-testing and on-line fault detection combinational circuits with weakly independent outputs.
- Ye. L. Stolov:
Testing of multi-output circuits by means of signature analyzer.
- Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal:
The optimistic update theorem for path delay testing in sequential circuits.
Volume 4, Number 4, November 1993
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