Formal Methods in System Design
, Volume 2
Volume 2, Number 1, 1993
Hana De-Leon
,
Orna Grumberg
:
Modular Abstractions for Verifying Real-Time Distributed Systems.
7-43
Catia M. Angelo
,
Diederik Verkest
,
Luc J. M. Claesen
,
Hugo De Man
:
On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification.
45-72
Stephen D. Brookes
:
Using Fixed-Point Semantics to Prove Retiming Lemmas.
73-91
Pranav Ashar
,
Srinivas Devadas
,
Kurt Keutzer
:
Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks.
93-112
Volume 2, Number 2, April 1993
Rance Cleaveland
,
Bernhard Steffen
:
A Linear-Time Model-Checking Algorithm for the Alternation-Free Modal Mu-Calculus.
121-147
Patrice Godefroid
,
Pierre Wolper
:
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties.
149-164
Ramayya Kumar
,
Klaus Schneider
,
Thomas Kropf
:
Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment.
165-223
Volume 2, Number 3, June 1993
Michael C. McFarland
:
Formal Analysis of Correctness of Behavioral Transformations.
231-257
Ghislaine Thuau
,
Bachir Berkane
:
A Unified Framework for Describing and Verifying Hardware Synchronous Sequential Systems.
259-276
Kshirasagar Naik
,
Behçet Sarikaya
:
Test Case Verification by Model Checking.
277-321
Last update Sat May 18 16:20:43 2013 CET by the
DBLP Team
—
Data released under the
ODC-BY 1.0 license
— See also our
legal information page