IBM Journal of Research and Development, Volume 46, 2002

Volume 46, Number 1, 2002

• Joel M. Tendler, J. Steve Dodson, J. S. Fields Jr., Hung Le, Balaram Sinharoy:
  POWER4 system microarchitecture. 5-26
  
• James D. Warnock, John M. Keaty, John G. Petrovick, Joachim G. Clabes, Charles J. Kircher, Byron Krauter, Phillip Restle, Brian A. Zoric, Carl J. Anderson:
  The circuit and physical design of the POWER4 microprocessor. 27-52
  
• John M. Ludden, Wolfgang Roesner, Gerry M. Heiling, John R. Reysa, Jonathan R. Jackson, Bing-Lun Chu, Michael L. Behm, Jason Baumgartner, Richard D. Peterson, Jamee Abdulhafiz, William E. Bucy, John H. Klaus, Danny J. Klema, Tien N. Le, F. Danette Lewis, Philip E. Milling, Lawrence A. McConville, Bradley S. Nelson, Viresh Paruthi, Travis W. Pouarz, Audre D. Romonosky, Jeff Stuecheli, Kent D. Thompson, Dave W. Victor, Bruce Wile:
  Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system. 53-76
  
• Douglas C. Bossen, Alongkorn Kitamorn, Kevin Reick, Michael S. Floyd:
  Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology. 77-86
  
• Gregory P. Rodgers, Isidore G. Bendrihem, Thomas J. Bucelot, Barry D. Burchett, John C. Collins:
  Infrastructure requirements for a large-scale, multi-site VLSI development project. 87-96
  
• Ramesh C. Agarwal, Robert F. Enenkel, Fred G. Gustavson, Alok Kothari, Mohammad Zubair:
  Fast pseudorandom-number generators with modulus 2k or 2k - 1 using fused multiply-ad. 97-
  

Volume 46, Number 2-3, 2002

• G. G. Shahidi:
  SOI technology for the GHz era. 121-132
  
• H.-S. Philip Wong:
  Beyond the conventional transistor. 133-168
  
• Edward J. Nowak:
  Maintaining the benefits of CMOS scaling when scaling bogs down. 169-186
  
• Jack A. Mandelman, Robert H. Dennard, Gary B. Bronner, John K. DeBrosse, Rama Divakaruni, Yujun Li, Carl J. Raden:
  Challenges and future directions for the scaling of dynamic random-access memory (DRAM). 187-222
  
• Ravi Nair:
  Effect of increasing chip density on the evolution of computer architectures. 223-234
  
• David J. Frank:
  Power-constrained CMOS scaling limits. 235-344
  
• James D. Meindl, Jeffrey A. Davis, Payman Zarkesh-Ha, Chirag S. Patel, Kevin P. Martin, Paul A. Kohl:
  Interconnect opportunities for gigascale integration. 245-264
  
• James H. Stathis:
  Reliability limits for the gate insulator in CMOS technology. 265-286
  
• Ernest Y. Wu, Edward J. Nowak, Alex Vayshenker, Wing L. Lai, David L. Harmon:
  CMOS scaling beyond the 100-nm node with silicon-dioxide-based gate dielectrics. 287-298
  
• Carlton M. Osburn, Indong Kim, Sungkee Han, Indranil De, Kam F. Yee, Shyam Gannavaram, SungJoo Lee, Chung-Ho Lee, Zhijiong J. Luo, Wenjuan Zhu, John R. Hauser, Dim-Lee Kwong, Gerald Lucovsky, T. P. Ma, Mehmet C. Öztürk:
  Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go? 299-316
  
• Paul D. Agnello:
  Process requirements for continued scaling of CMOS-the need and prospects for atomic-level manipulation. 317-338
  
• Mark E. Law:
  Process modeling for future technologies. 339-346
  
• Anthony Lochtefeld, Ihsan J. Djomehri, Ganesh Samudra, Dimitri A. Antoniadis:
  New insights into carrier transport in n-MOSFETs. 347-358
  

Volume 46, Number 4-5, 2002

• Kenneth E. Plambeck, Wolfgang Eckert, Robert R. Rogers, Charles F. Webb:
  Development and attributes of z/Architecture. 367-380
  
• Eric M. Schwarz, Mark A. Check, Chung-Lung Kevin Shum, Thomas Koehler, Scott B. Swaney, John D. MacDougall, Christopher A. Krygowski:
  The microarchitecture of the IBM eServer z900 processor. 381-396
  
• Hubert Harrer, Harald Pross, Thomas-Michael Winkel, Wiren D. Becker, Herb I. Stoller, Masakazu Yamamoto, Shinji Abe, Bruce J. Chamberlin, George A. Katopis:
  First- and second-level packaging for the IBM eServer z900. 397-420
  
• Daniel J. Stigliani Jr., Tim E. Bubb, Daniel F. Casper, James H. Chin, Steven G. Glassen, Joseph M. Hoke, Vahe A. Minassian, John H. Quick, Carl H. Whitehead:
  IBM eServer z900 I/O subsystem. 421-446
  
• Joseph M. Hoke, Paul W. Bond, Robert R. Livolsi, Tin-chee Lo, Frank S. Pidala, Gary Steinbrueck:
  Self-timed interface of the input/output subsystem of the IBM eServer z900. 447-460
  
• Thomas A. Gregg, Richard K. Errickson:
  Coupling I/O channels for the IBM eServer z900: Reengineering required. 461-474
  
• Michael E. Baskey, Marcus Eder, David A. Elko, Bruce H. Ratcliff, Donald W. Schmidt:
  zSeries features for optimized sockets-based messaging: HiperSockets and OSA-Express. 475-486
  
• Ingo Adlung, Gerhard Banzhaf, Wolfgang Eckert, George Kuch, Stefan Mueller, Christoph Raisch:
  FCP for the IBM eServer zSeries systems: Access to distributed storage. 487-502
  
• Luiz C. Alves, Myron L. Fair, Patrick J. Meaney, C. L. Chen, William J. Clarke, George C. Wellwood, Norman E. Weber, Indravadan N. Modi, Brian K. Tolan, Fritz Freier:
  RAS design for the IBM eServer z900. 503-522
  
• Friedemann Baitinger, Herwig Elfering, Gerald Kreissig, Daniel Metz, Juergen Saalmueller, Frank Scholz:
  System control structure of the IBM eServer z900. 523-536
  
• Andreas Bieswanger, Franz Hardt, Astrid Kreissig, Harm Osterndorf, Gerhard Stark, Helmut Weber:
  Hardware configuration framework for the IBM eServer z900. 537-550
  
• Jürgen Probst, Brian D. Valentine, Christine Axnix, Klaus Kuehl:
  Flexible configuration and concurrent upgrade for the IBM eServer z900. 551-558
  
• Brian D. Valentine, Helmut Weber, John D. Eggleston:
  The alternate support element, a high-availability service console for the IBM eServer z900. 559-566
  
• William J. Rooney, Jeffrey P. Kubala, Juergen Maergner, Peter Yocom:
  Intelligent Resource Director. 567-586
  
• Stefan Koerner, Martin Kuenzel, Edward C. McCain:
  IBM eServer z900 system microcode verification by simulation: The virtual power-on process. 587-596
  
• Jörg Kayser, Stefan Koerner, Klaus-Dieter Schubert:
  Hyper-acceleration and HW/SW co-verification as an essential part of IBM eServer z900 verification. 597-606
  
• Joachim von Buttlar, Harald Böhm, Reinhard Ernst, Axel Horsch, Andreas Kohler, Herbert Schein, Michael Stetter, Klaus Theurich:
  z/CECSIM: An efficient and comprehensive microcode simulator for the IBM eServer z900. 607-616
  
• Jose F. Silverio, Y. Ming Ng, David F. Anderson:
  Hierarchical indexing data structure method for verifying the functionality of the STI-to-PCI bridge chips of the IBM eServer z900. 617-630
  
• Brian W. Curran, Yuen H. Chan, Philip T. Wu, Peter J. Camporese, Gregory A. Northrop, Robert F. Hatch, Lisa B. Lacey, James P. Eckhardt, David T. Hui, Howard H. Smith:
  IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology. 631-
  

Volume 46, Number 6, 2002

• Thomas M. Reeves, Timothy K. Ravey:
  Preface. 647-
  
• George W. Doerre, David E. Lackey:
  The IBM ASIC/SoC methodology - A recipe for first-time success. 649-660
  
• Thomas R. Bednar, Patrick H. Buffet, Randall J. Darden, Scott W. Gould, Paul S. Zuchowski:
  Issues and strategies for the physical design of system-on-a-chip ASICs. 661-674
  
• John E. Barth Jr., Jeffrey Dreibelbis, Eric A. Nelson, Darren Anand, Gary Pomichter, Peter Jakobsen, Michael R. Nelms, Jeffrey Leach, George M. Belansek:
  Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offering. 675-690
  
• John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin:
  Early analysis tools for system-on-a-chip design. 691-708
  
• Vincent Cozzolino, Prabjit Singh:
  Preface. 709-710
  
• Prabjit Singh, Steven J. Ahladas, Wiren D. Becker, Frank E. Bosco, Joseph P. Corrado, Gary F. Goth, Sushumna Iruvanti, Matthew A. Nobile, Budy D. Notohardjono, John H. Quick, Edward J. Seminaro, Kwok M. Soohoo, Chang-yu Wu:
  A power, packaging, and cooling overview of the IBM eServer z900. 711-738
  
• Roger R. Schmidt, Budy D. Notohardjono:
  High-end server low-temperature cooling. 739-752
  
• Michael J. Ellsworth Jr., Roger R. Schmidt, Dereje Agonafer:
  Design and analysis of a scheme to mitigate condensation on an assembly used to cool a processor module. 753-762
  
• John S. Corbin, Ciro N. Ramirez, Danny E. Massey:
  Land grid array sockets for server applications. 763-778
  
• John U. Knickerbocker, Frank L. Pompeo, Alice F. Tai, Donald L. Thomas, Roger D. Weekly, Michael G. Nealon, Harvey C. Hamel, Anand Haridass, James N. Humenik, Richard A. Shelleman, Srinivasa N. Reddy, Kevin M. Prettyman, Benjamin V. Fasano, Sudipta K. Ray, Thomas E. Lombardi, Kenneth C. Marston, Patrick A. Coico, Peter J. Brofman, Lewis S. (Lew) Goldmann, David L. Edwards, Jeffrey A. Zitz, Sushumna Iruvanti, Subhash L. Shinde, Hai P. Longworth:
  An advanced multichip module (MCM) for high-performance UNIX servers. 779-804
  

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