International Journal of Embedded Systems, Volume 3

Volume 3, Number 1/2, 2007

• Christian W. Probst, Ulrich Kremer, Luca Benini, Peter Schelkens:
  Power-aware computing systems. 3-7
  
• Jerry Hom, Ulrich Kremer:
  Inter-program optimisations for disk energy reduction. 8-16
  
• Vasanth Venkatachalam, Michael Franz, Christian W. Probst:
  A new way of estimating compute-boundedness and its application to dynamic voltage scaling. 17-30
  
• Chunling Hu, Daniel A. Jiménez, Ulrich Kremer:
  An evaluation infrastructure for power and energy optimisations. 31-42
  
• Giacomo Paci, Francesco Poletti, Luca Benini, Paul Marchal:
  Exploring temperature-aware design in low-power MPSoCs. 43-51
  
• Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir:
  Design of power-aware FPGA fabrics. 52-64
  
• Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
  Power management in external memory using PA-CDRAM. 65-72
  
• José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest:
  Energy-aware compilation and hardware design for VLIW embedded systems. 73-82
  
• Gaurav Singh, Sandeep K. Shukla:
  Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS). 83-92
  
• Matthias Grumer, Christian Steger, Manuel Wendt, Andreas Mühlberger, Ulrich Neffe:
  Horizontal and vertical HW/SW co-design flows for power aware smart card designs. 93-106
  

Volume 3, Number 3, 2008

• Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr:
  SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. 109-118
  
• Jong-eun Lee, Kiyoung Choi, Nikil Dutt:
  Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures. 119-127
  
• Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro:
  Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers. 128-140
  
• Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero:
  Power-efficient VLIW design using clustering and widening. 141-149
  
• Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr:
  Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. 150-159
  
• Pablo Robelly, Gordon Cichon, H. Ahlendorf, Gerhard Fettweis:
  A HW/SW design methodology for embedded SIMD vector signal processors. 160-169
  
• Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
  Deriving efficient control in Process Networks with Compaan/Laura. 170-180
  
• Andy D. Pimentel:
  The Artemis workbench for system-level performance evaluation of embedded systems. 181-196
  

Volume 3, Number 4, 2008

• Thorsten Dräger, Gerhard Fettweis:
  Application-specific permutation networks. 199-208
  
• Terry Tao Ye, Giovanni De Micheli:
  On-chip implementation of multiprocessor networks and switch fabrics. 209-218
  
• Zhijie Jerry Shi, Xiao Yang, Ruby B. Lee:
  Alternative application-specific processor architectures for fast arbitrary bit permutations. 219-228
  
• Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle:
  Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier. 229-240
  
• Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vipul Gupta:
  A cryptographic processor for arbitrary elliptic curves over GF(2^m). 241-255
  
• Piia Saastamoinen, Ilkka Saastamoinen, Jari Nurmi:
  Code compression in DSP processor systems. 256-262
  
• P. H. Chan, Jack Y. B. Lee:
  An efficient disk-array-based server design for a multicast video streaming system. 263-270
  
• Anne-Claire Guillou, Patrice Quinton, Tanguy Risset:
  Hardware synthesis for systems of recurrence equations with multidimensional schedule. 271-284
  
• José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum:
  A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. 285-293
  
• Herbert Bos, Bart Samwel, Mihai-Lucian Cristea, Kostas Anagnostakis:
  Safe execution of untrusted applications on embedded network processors. 294-303