Integration, Volume 31

Volume 31, Number 1, November 2001

• Jiang Hu, Sachin S. Sapatnekar:
  A survey on multi-net global routing for integrated circuits. 1-49
  
• Rolf Drechsler, Wolfgang Günther:
  History-based dynamic BDD minimization. 51-63
  
• Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu:
  Floorplanning with abutment constraints based on corner block list. 65-77
  
• Luca Fanucci, Sergio Saponara, Lorenzo Bertini:
  A parametric VLSI architecture for video motion estimation. 79-100
  

Volume 31, Number 2, May 2002

• José M. Mendías, Román Hermida, Olga Peñalba:
  A study about the efficiency of formal high-level synthesis applied to verification. 101-131
  
• Yumin Zhang, Xiaobo Sharon Hu, Danny Z. Chen:
  Cell selection from technology libraries for minimizing power. 133-158
  
• Suresh Raman, Sachin S. Sapatnekar, Charles J. Alpert:
  Probability-driven routing in a datapath environment. 159-182
  
• Y. Tsiatouhas, Yiannis Moisiadis, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni:
  A new technique for IDDQ testing in nanometer technologies. 183-194