Journal of Circuits, Systems, and Computers, Volume 15

Volume 15, Number 1, February 2006

Raida Al-Alawi, A-Imam Al-Sammak:
Design of a Multicode Bi-phase Encoder for Data Transmission. 1-12
Kuo-Hsing Cheng, Shun-Wen Cheng, Wen-Shiuan Lee:
64-bit Pipeline Carry Lookahead Adder Using all-n-transistor Tspc Logics. 13-28
O. P. Sahu, M. K. Soni, I. M. Talwar:
Designing Quadrature Mirror Filter Banks Using Steepest Descent Method. 29-42
Jose Maria Rodríguez Corral, Antón Civit Balcells, Gabriel Jiménez-Moreno, José Luis Sevillano, Arturo Morgado Estevez:
Influence of Input/output Operations on Processor Performance. 43-56
Xiangbin Yu, Xiaodong Zhang, Guangguo Bi:
Performance Analysis of Multicarrier Cdma System Based on Complex Wavelet Packet and Space-time Block Codes in Rayleigh Fading Channel. 57-74
Erkan Yüce, Oguzhan Cicekoglu, Shahram Minaei:
Novel Floating Inductance and Fdnr Simulators Employing Ccii+s. 75-82
Pedram Mokrian, Majid Ahmadi, Graham A. Jullien:
On the Reduction of Interconnect Effects in Deep Submicron Implementations of Digital Multiplication Architectures. 83-106
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang:
Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm. 107-128
Shugang Wei, Kensuke Shimizu:
Modulo (2^p plusminus 1) Multipliers Using a Three-operand Modular Signed-digit Addition Algorithm. 129-144

Yoonseo Choi, Taewhan Kim:
Memory Access Driven Storage Assignment for Variables in Embedded System Design. 145-168
Assim Sagahyroon, Ahmed H. Mohamed:
Resizable Translation Storage Buffers. 169-181
J. J. Liu, Manh Anh Do, X. P. Yu, Kiat Seng Yeo, Shan Jiang, Jianguo Ma:
Cmos Even Harmonic Switching mixer for Direct Conversion Receivers. 183-196
Yu Wang, Huazhong Yang, Hui Wang:
Signal-Path-Level Dual-V_T Assignment for Leakage Power Reduction. 197-216
Mohamed A. El-Gamal, Hany L. Abdel-Malek, M. A. Sorour:
Automatic Circuit Tuning via Unsupervised Learning Paradigms. 217-242
Bogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja:
Column Polarity Matrix Algorithm for Ternary Fixed Polarity Reed-muller Expansions. 243-262
Moo-Kyung Kang, Chong-Min Kyung:
Three-Stage Clos-Network Switch Architecture with Buffered Center Stage for Multi-Class Traffic. 263-276
Ko Yoshikawa, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura:
Domino Logic Synthesis System and its Applications. 277-287
Sudhanshu Maheshwari, Iqbal A. Khan, Jitendra Mohan:
Grounded capacitor First-Order Filters Including Canonical Forms. 289-300
Xiaofan Yang, Graham M. Megson, Yongkang Xing, David J. Evans:
A Novel Radix-3/9 Algorithm for Type-III Generalized Discrete Hartley Transform. 301-312

S. Eliahou-Niv:
A Mechanical Darlington Model for MEMS Applications. 313-319
Mohammad Khalaj-Amirhosseini:
Optimization of Microstrip Interconnects Containing Additional Capacitive Coupling Using Least Mean Square Method. 321-329
Haidar M. Harmanani, Hassan A. Salamy:
Power-Constrained System-on-a-Chip Test Scheduling Using a Genetic Algorithm. 331-349
Yehya H. Ghallab, Wael M. Badawy, Mohamed Abou El-Ela, Mohamed H. el-Said:
The Operational Floating Current Conveyor and its Applications. 351-372
Marina Vassilaki, Georges Bitsoris:
An Optimization Approach to the Design of Constrained Regulators for Uncertain Discrete-Time Systems. 373-387
Kiyotaka Yamamura, Akinori Machida:
Finding All Solutions of Piecewise-Linear Resistive Circuits with High Approximation Accuracy. 389-398
Youngsoo Shin, Junghyup Lee:
Power Analysis of VLSI Interconnect with RLC Tree Models and Model Reduction. 399-408
L. Premalatha, P. Vanajaranjan:
Use of Recurrence Plot Analysis for Detecting Chaos and Noise in Nonlinear Switching Circuits. 409-436
Boris D. Andreev, Edward L. Titlebaum, Eby G. Friedman:
Sizing CMOS inverters with Miller Effect and Threshold voltage Variations. 437-454
Zhiquan Bai, Shaoyi Xu, Weihua Zhang, Kyungsup Kwak:
Performance Analysis of a Novel M-Ary Code Selected DS-Bpam UWB Communication System. 455-466

André Boyoguéno, Mohamad Sawan, Mustapha Slamani:
A BICMOS 120 MW 11 GHZ transimpedance amplifier Dedicated for High-Speed Photoreceivers. 467-490
Robert Chen-Hao Chang, Po-Chung Hung, Hsin-Lei Lin:
Low Power Energy Recovery Complementary Pass-Transistor Logic. 491-504
Yefim Berkovich, Gady Golan:
Electric Models of Large-Scale Systems and their Analogy to Thermodynamic Systems. 505-519
F. Taringoo, Javad Poshtan, A. Nasiri, Mohammad Hossein Kahaei:
Design of Decoupling Active Noise Control Systems. 521-536
Stefania Perri, Maria Antonia Iachino, Pasquale Corsonello:
Simd Multipliers for Accelerating Embedded Processors in FPGAS. 537-550
Li Jiao, To-Yat Cheung:
Compositional Verification for Workflow Nets. 551-570
Samir M. Koriem:
Performance Models for Studying and Analyzing Real-Time Multimedia Systems. 571-606
Leonardo Acho:
Expanded Lorenz Systems and Chaotic Secure Communication Systems Design. 607-614
Lidan Zhou, Muhammad Mansoor Khan, Feifeng Ji, Gang Yao, Da Xie, Chen Chen, Joan Shu:
On Using Linear Periodically resetting Filter in Current Control Loop for Active Power Filter. 615-639
K. M. S. Soyjaudah, T. P. Fowdur:
Critical Analysis of a Combined Huffman and convolutional Coding Scheme. 641-657

Arash Esmaili, Abdollah Khoei, Khayrollah Hadidi:
A High Speed and Compact Mixed-Signal CMOS Fuzzifier. 659-669
Nisar Ahmed Shah, Mohammad Farooq Rather:
High Input and Low Output Impedance voltage-Mode lowpass, bandpass, and Highpass Active-R Filter. 671-678
Najeem Lawal, Benny Thörnberg, Mattias O'Nils, Håkan Norell:
Ram Allocation Algorithm for Video Processing Applications on FPGA. 679-699
Hsiao Wei Su, Yichuang Sun:
High-Frequency Linear Multiple-Output CMOS transconductance amplifier for Current-Mode Filters. 701-717
I-Ming Tsai, Sy-Yen Kuo:
An Algorithm for Minimum Space Quantum Boolean Circuits Construction. 719-738
Ioannis Voyiatzis, D. Kehagias:
A SiC Pair Generator for a Bilbo Environment. 739-756
S. Arulselvi, Uma Govindarajan:
Development of Simple Fuzzy Logic Controller for Extended Period-ZCS/ZVS-Quasi Resonant converter: Design, Simulation, and Experimentation. 757-776
Mamun Bin Ibne Reaz, M. Akter, Faisal Mohd-Yasin:
Image Compression System for Mobile Communication: Advancement in the Recent Years. 777-815

Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou:
Architectures and FPGA Implementations of the 64-Bit MISTY1 Block Cipher. 817-831
Abbas Pourzaki, Khalil Mafinejad, Sayyed Hosain Keshmiri:
A New Method for CDMA Signal Modeling in Nonlinear Systems. 833-848
Samir Ben Salem, Dorra Sellami Masmoudi, Mourad Loulou:
A Novel CCII-Based Tunable inductance and High Frequency Current-Mode Band Pass Filter Application. 849-860
Hamid R. Zarandi, Seyed Ghassem Miremadi:
Hierarchical Set-Associate Cache for High-Performance and Low-Energy Architecture. 861-880
Tatjana Kapus:
Specification and Verification of a Parametric Handover Procedure Using TLA. 881-906
Chun-Ching Wang, Yih-Chuan Lin, Chi-Yin Lin:
Rom Reduction for OFDM System Using Time-Stealing Strategy. 907-921

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