W. J. Yang, Y. Zhou, K. T. Lau: Low Power Adiabatic Programmable Logic Array with Single Clock Iapdl. 211-219
Kiat Seng Yeo, Zhi-Hui Kong: Spicesoft: Automated Tool for Sensitivity Analysis, Performance Analysis, and Inverse Performance Analysis of Digital Circuits. 221-238
Shahram Minaei, Erkan Yüce: A Tunable Circuit for Realizing Arbitrary Floating Impedances. 513-524
Mingzhi He, Jianping Xu: Elimination of Time Delay in Digital Control Loop of Switching Dc-dc converters. 525-537
Volume 17, Number 4, August 2008
Ashraf A. Zaher, Abdulnasser Abu-Rezq: Adaptive Model-Reference Control for a Class of Uncertain Nonlinear Systems Using a Simple Systematic Lyapunov-Based Design. 539-559
Joze Dedic, Matjaz Finc, Andrej Trost: A Methodology for Supporting System-Level Design Space Exploration at Higher Levels of Abstraction. 703-727
Anas N. Al-Rabadi: Reversible Systolic Arrays: M-Ary Bijective Single-Instruction Multiple-Data (SIMD) Architectures and their Quantum Circuits. 729-771
Volume 17, Number 5, October 2008
Heesung Lee, Euntai Kim: A New Genetic Design for Error Correcting Code for Power Minimization. 773-783
Ahmed M. Soliman: History and Progress of the Tow-thomas biquadratic Filter Part II: Otra, CCII, and Dvcc Realizations. 797-826
Erkan Yüce, Kirat Pal, Shahram Minaei: A High Input Impedance voltage-Mode All-Pass/notch Filter Using a Single Variable Gain Current Conveyor. 827-834
Remzi Tuntas, Yakup Demir, Muhammet Köksal: A New Approach for the Analysis of the Transient and Steady State of Piecewise-Linear Circuits by Neural Networks. 1091-1109
David Wolpert, Paul Ampadu: Adaptive Delay Correction for Runtime Variation in Dynamic voltage Scaling Systems. 1111-1128