Journal of Instruction-Level Parallelism, Volume 3

Volume 3, 2001

• Michael S. Schlansker, Chris J. Newburn:
  Guest Editors' Introduction.
  
• Amir Roth, Gurindar S. Sohi:
  Squash Reuse via a Simplified Implementation of Register Integration.
  
• Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
  Breaking Address Mapping Symmetry at Multi-levels of Memory Heirarchy to Reduce DRAM Row-buffer Conflicts.
  
• Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens:
  Improving Bandwidth Utilization using Eager Writeback.
  
• F. Jesús Sánchez, Antonio González:
  Clustered Modulo Scheduling in a VLIW Architecture with Distributed Cache .
  
• Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas:
  The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management.
  
• Peter Rundberg, Per Stenström:
  An All-Software Thread-Level Data Dependence Speculation System for Multiprocessors.