Volume 16,
Number 1,
January 2000
Special Section On Distributed And Parallel Computing
Regular Section - Computer Graphics and Virtual Reality
Computer Architectures
- Yu-Wei Chen, Kuo-Liang Chung:
A Parallel Approach for Embedding Large Pyramids Into Smaller Hypercubes With Load Balancing.
117-126
Pattern Recognition
Volume 16,
Number 2,
March 2000
Special Issue On Parallel And Distributed Computing
Regular Section
Volume 16,
Number 3,
May 2000
Special Section On Parallel And Distributed Computing
- Katsuya Tanaka, Kyoji Hasegawa, Makoto Takizawa:
Quorum-Based Replication in Object-Based Systems.
317-332
- Wei Kuan Shih, Chung-Der Lin, Yar-Wen Chang, Jenq Kuen Lee:
Real-Time Gang Schedulings With Workload Models for Parallel Computers.
333-348
- Pi-Chung Wang, Chia-Tai Chan, Yaw-Chung Chen:
Design and Analysis of Traffic Control for Guaranteed Services on the Internet.
349-364
- Winston Lo, Yue-Shan Chang, Shyan-Ming Yuan, Deron Liang:
The Design and Implementation of a Multi-Threaded Object Request Broker.
365-380
Regular Section - Algorithms
Software Engineering
Volume 16,
Number 4,
July 2000
Special Section On Database Management
- Yangjun Chen:
A Systematic Method for Query Evaluation in Distributed Heterogeneous Databases.
463-497
- Reda Alhajj:
An Object-Oriented Query Model: An Algebraic Approach With Closure.
499-533
- San-Yih Hwang:
On Optimistic Methods for Mobile Transactions.
535-554
- Yangjun Chen:
Integrating Heterogeneous OO Schemas.
555-591
- Pauray S. M. Tsai, Arbee L. P. Chen:
Partial Natural Outerjoin - An Operation for Interoperability in a Multidatabase Environment.
593-617
Regular Section
Signal and Speech Processing
Image Processing and Computer Vision
- Yih-Chuan Lin:
Optimal Feature-based Vector Quantization of Image Coding Using Integral Projection.
661-668
Volume 16,
Number 5,
September 2000
Special Issue On Vlsi Testing
- Angela Krstic, Srimat T. Chakradhar, Kwang-Ting Cheng:
Testable Path Delay Fault Cover for Sequential Circuits.
673-686
- Hsing-Chung Liang, Chung-Len Lee:
Flip-Flop Selection for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits.
687-702
- Elizabeth M. Rudnick, Miron Abramovici:
Compact Test Generation Using a Frozen Clock Testing Strategy.
703-717
- Sying-Jyan Wang, Chia-Chun Lien:
Testability Improvement by Branch Point Control for Conditional Staements With Multiple Branches.
719-731
- Shyue-Kung Lu, Jen-Sheng Shih:
Testing Configurable LUT-Based FPGAs.
733-750
- Yeong-Jar Chang, Chung-Len Lee, Jwu E. Chen, Chauchin Su:
A Behavior-Level Fault Model for the Closed-Loop Operational Amplifier.
751-766
- Chauchin Su, Yue-Tsang Chen, Shenshung Chiang:
Impulse Response Fault Model and Fault Extraction for Functional Level Analog Circuit Diagnosis.
767-781
- Chih-Yuang Su, Cheng-Wen Wu:
A Probabilistic Model for Path Delay Fault Testing.
783-794
Volume 16,
Number 6,
November 2000
Special Section On Data Encryption And Cryptography
Regular Section Software Engineering
Algorithms
Information Systems and Applications
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