Microprocessing and Microprogramming, Volume 39

Volume 39, Number 1, November 1993

• Seong Baeg Kim, Myung Soon Park, Sun-Ho Park, Sang Lyul Min, Heonshik Shin, Chong-Sang Kim, Deog-Kyoon Jeong:
  Threaded prefetching: An adaptive instruction prefetch mechanism. 1-15
  
• V. A. Spais, L. P. Petrou:
  Implementation of the robot inverse dynamics computation algorithm on a transputer network. 17-23
  
• Bogong Su, Jian Wang, Zhizhong Tang, Chihong Zhang, Wei Zhao:
  URPR-1: A single-chip VLIW architecture. 25-41
  
• Jie Wu, Eduardo B. Fernández:
  Broadcasting in faulty hypercubes. 43-53
  

Volume 39, Numbers 2-5, December 1993

• Benny Graft Mortensen, Ferenc Vajda:
  Preface.
  
• Miroslaw Thor, Tomasz Kalinowski:
  HP-MODTRANS: A High performance modular transputer architecture. 59-63
  
• J. Hernandez, Pedro de Miguel, Manuel Barrena García, Juan Miguel Martínez, Antonio Polo Márquez, Manuel M. Nieto Rodríguez:
  Implementation details of ALBA in a transputer machine. 65-68
  
• András Pataricza, István Majzik, Wolfgang Hohl, Joachim Hönig:
  Watchdog processors in parallel systems. 69-74
  
• Fleur L. Steven, R. G. Adams, Gordon B. Steven, L. Wang, D. J. Whale:
  Addressing mechanisms for VLIW and superscalar processors. 75-78
  
• Péter Kacsuk:
  Memory management in LOGFLOW. 79-82
  
• Jordi Tubella, Antonio González:
  MEM: A new execution model for Prolog. 83-86
  
• Anna Antola, Fausto Distante, Andrea Marchese:
  High level synthesis through folding of data flow graphs: Optimal intra-node scheduling. 89-92
  
• Mary Buchanan, Bob Dickerson, Carol Britton, Martin Loomes:
  Using CCS for the specification of inheritance. 93-96
  
• Maximilian Frey, Andreas Weininger:
  Using temporal logic specifications to debug parallel programs. 97-100
  
• Won Yong Kim, Yoon-Joon Lee, Joon Ho Lee, Young Hwa Cho:
  The fuzzy set model based on N-ary positively compensatory operators. 101-104
  
• Joon Ho Lee, Myoung-Ho Kim, Young Hwa Cho:
  Using term dependencies of a thesaurus in the fuzzy set model. 105-108
  
• Francisco Guerra Santana, Sergio Arévalo, Angel Alvarez, Javier Miranda:
  A quick distributed consensus protocol. 111-114
  
• Janusz Sosnowski, Anna Derezinska, Ilona Bluemke:
  Autodiagnostics for transputer systems. 115-118
  
• Stergios Papadimitriou, Achilles Kameas, Georgios Pavlides:
  Determining effective multiprocessor scheduling policies for repetitive real-time tasks. 119-124
  
• Josep-Lluis Larriba-Pey, Angel Jorba, Juan J. Navarro:
  Spike Algorithm with savings for strictly diagonal dominant tridiagonal systems. 125-128
  
• Peter Milligan, T. J. G. Benson, R. K. McConnell, A. Rea:
  Process to processor mapping within the mathematician's Devil. 129-132
  
• A. Jávor, Á. Vigh:
  Conflict handling in high level Petri Nets. 133-136
  
• A. del Río, P. Mariño:
  A rule based programming language for real-time applications. 139-142
  
• Tatjana Kapus, Bogomir Horvat, Marjeta Pucko:
  A true concurrency semantics for parallel programs. 143-146
  
• Tamás Gaál:
  Parallel compiler generation. 147-150
  
• Miroslav Svéda:
  Language prototyping with attribute grammars and macros. 151-154
  
• Hongwoo Nam, Songchun Moon:
  Global deadlock detection for concurrency control in multidatabase systems. 155-158
  
• Wojciech Cellary, Waldemar Wieczerzycki:
  Locking in DAG-structured databases. 161-164
  
• Do Heon Lee, Myoung Ho Kim:
  Extending semantics of relational operators for vague queries. 165-168
  
• G. Moreno, P. González, J. A. Gámez:
  Parallel algorithm for table division in relational databases. 169-172
  
• Dongwook Shin, Yongun Yoon, Key-Sun Choi:
  The performance evaluation of a knowledge-based information retrieval system. 173-176
  
• Byungwook Kim, Songchun Moon:
  A flexible indexing structure supporting multi-attribute database applications: MAIN. 177-180
  
• Denis Trcek, Borka Jerman-Blazic:
  Certificates handling and their support within X.500 system. 183-186
  
• P. Mariño, A. del Río:
  An accurate and fast CSMA/CD simulator. 187-190
  
• Sarolta Dibuz:
  A frame-based approach to conformance testing. 191-194
  
• Marjeta Pucko, Gorazd Kandus:
  Service-driven protocol synthesis for specific users. 195-198
  
• Carlos F. Alastruey, José Ramón González de Mendívil:
  Advances in adaptive simulation of interconnected systems with delays. 201-204
  
• Leszek Borzemski, D. Gajewski, S. Glowacz, M. Szczypinski, K. Wojtczak:
  A load balancing system for unix-based local area networks. 205-208
  
• Juan Carlos Calderón, JoséRamón Salvador, Rafael Valle, Luis París, Carles Ferrer:
  Multi-protocol communications controller. 209-212
  
• Monika Kapus-Kolar:
  Derivation of protocols implementing services with event priorities. 213-216
  
• Jonghyun Lee, Songchun Moon:
  Architecture for interoperability of network management systems in multi-domain network. 217-220
  
• Heping He, Hussein Zedan:
  Cycle calculus for hybrid systems. 223-227
  
• Willem Jan Withagen, Rob Takken:
  Hierachical modeling and simulation of processor architectures. 229-232
  
• R. Moreno, Román Hermida, Daniel Mozos, Katzalin Olcoz:
  Global hardware synthesis guided by realistic probability computation. 233-236
  
• M. G. Sami, Donatella Sciuto, Renato Stefanelli:
  Concurrently self-checking structures for Fsms. 237-240
  
• George-Peter K. Economou, Spiridon Nikolaidis, D. E. Metafas, Constantinos E. Goutis:
  Development of a technology independent library. 241-244
  
• F. C. Blom, J. Oliver, M. Rullán, C. Ferrer:
  Testability enhancement using physical design rules in a CMOS cell library. 245-248
  
• Labros Bisdounis, Dimitris Metafas, A. M. Maras, C. Mavridis:
  VLSI implementation of digit-serial arithmetic modules. 251-254
  
• Lluis Ribas, Jordi Riera, J. M. Pérez, Joaquín Saiz, Jordi Carrabina, Lluís Terés:
  Automatic pattern generation for the electrical characterization of digital modules. 255-258
  
• A. K. Betts, Ivo Bolsens, E. Sicard, Marc Renaudin, A. Johnstone:
  SMILE: A scalable microcontroller library element. 259-262
  
• Katzalin Olcoz, Francisco Tirado, Daniel Mozos, Julio Septién, R. Moreno:
  Data path structures and heuristics for testable allocation in high level synthesis. 263-266
  
• L. Gómez, A. Hernández, A. Nunez:
  Multiobjective optimization using analytical models of GaAs high-speed digital circuits. 267-270
  
• Dieter Welzel, Hans-Ludwig Hausen:
  A five step method for metric-based software evaluation - effective software metrication with respect to quality standards. 273-276
  
• I. del Campo, José Ramón González de Mendívil, José Manuel Tarela:
  Development of a fuzzy logic controller on a digital signal processor. 277-280
  
• Zdenek Blazek:
  Monitoring and data recording system for the underground. 281-284
  
• A. Dékány, I. Erényi, Sándor Fejes:
  High-speed parallel implementation of the statistical feature matrix method. 285-288