Microprocessing and Microprogramming, Volume 40

Volume 40, Number 1, January 1994

• Chuan-Jen Chang, Stamatis Vassiliadis, José G. Delgado-Frias:
  An investigation of binary CLA and ripple CMOS adder designs. 1-21
  
• Veselko Gustin:
  Realization of a fuzzy Boolean neural network classifier. 23-31
  
• Syed Masud Mahmud:
  Models of asynchronous packet-switched multiple and partial multiple bus systems. 33-42
  
• Rajib Mall, Lalit M. Patnaik:
  Automatic verification of distributed logic specifications. 43-56
  
• Hong Shen:
  Efficient message routing in P_r^Sigma-network. 57-64
  
• A. A. Wardak, G. A. King, Rodney Lionel Rhodes:
  A microprogram-based 3-D image generation system using the Am29300 family. 65-75
  
• Veikko Seppänen:
  Euromicro's close encounter of the arctic circle - in real time. 77-80
  

Volume 40, Numbers 2-3, April 1994

• Harold W. Lawson:
  Parallel processing in embedded real-time systems. 83-90
  
• Gilberto F. Mota, Michael L. Nelson, Uno R. Kodres:
  Object-oriented decomposition for distributed systems. 91-102
  
• Eric Verhulst:
  Virtuoso: A virtual single processor programming system for distributed real-time applications. 103-115
  
• Ken Tindell, John Clark:
  Holistic schedulability analysis for distributed hard real-time systems. 117-134
  
• Alexander D. Stoyenko, Lonnie R. Welch, Bo-Chao Cheng:
  Response time prediction in object-based, parallel embedded systems. 135-150
  
• Yongik Yoon, Songchun Moon:
  Integrated commitment protocol for parallel transaction processing in real-time systems. 151-166
  
• Sandro Centro, Edward W. Davis, Robert A. Heaton, Ping Ni, Donatella Pascoli, Giorgio Urso:
  Real-time parallel processing in high energy physics: architecture of the Blitzen data acquisition system. 167-178
  
• William D. Allen, Robert J. Fornaro, Kenneth P. Garrard, Lauren W. Taylor:
  A high performance embedded machine tool controller. 179-191
  
• Yingfeng Oh, Sang Hyuk Son:
  Scheduling hard real-time tasks with tolerance of multiple processor failures. 193-206
  
• Jörgen Christmansson, Zbigniew Kalbarczyk, Jan Torin:
  Dependable flight control system by data diversity and self-checking components. 207-222
  

Volume 40, Number 4, May 1994

• M. D. Edwards:
  A generic hardware architecture to support the system level synthesis of digital systems. 225-240
  
• Gerrit K. Janssens:
  Delay time computation for an active star topology local area network. 241-248
  
• Kamal Kumar Jain, V. Rajaraman:
  Parallelism measures of task graphs for multiprocessors. 249-259
  
• Leslie L. Miller, S. R. Inglett:
  Enhancing performance in a parallel file system. 261-274
  
• V. Samoladas, L. Petrou:
  Special-purpose architectures for fuzzy logic controllers. 275-289
  
• Miroslav Svéda:
  An implementation-directed design method for microcontroller software. 291-301
  

Volume 40, Number 5, June 1994

• I. D'Antone:
  A parallel neural network implementation in a distributed fault diagnosis system. 305-313
  
• In Sang Chung, Yong Rae Kwon:
  An approach to partitioning programs on the functional basis and applications. 315-326
  
• Desra Ghazfan, Mark Nolan, Bala Srinivasan:
  Distribution algorithms for document allocation in multiprocessor information retrieval systems. 327-354
  
• Arthur I. Karshmer, James N. Thomas, Natalija Krivokapic:
  On implementing computer networking on existing cable TV plants: Some interesting proposals. 355-373
  

Volume 40, Number 6, July 1994

• Theodoros Antonakopoulos, Nick Kanopoulos:
  Multiple boundary scan-paths for minimizing circuit-board test-application time. 377-386
  
• Kanad Ghose:
  The architecture of response-pipelined content addressable memories. 387-410
  
• Mohammad S. Obaidat, Humayun Khalid, K. Sadiq:
  A methodology for evaluating the performance of CISC computer systems under single and two-level cache environments. 411-426
  
• Kassem Saleh, Anjali Agarwal:
  Efficient checkpointing procedures for fault tolerant distributed systems. 427-438
  
• Xiaoyu Song:
  An efficient DM switchbox router. 439-446
  

Volume 40, Number 7, October 1994

• Haengrae Cho, Songchun Moon:
  Specification and coordination of long-running design activities for CAD environments. 449-464
  
• Jai-Hoon Chung, Hyunsoo Yoon, Seung Ryoul Maeng:
  A new deadlock prevention scheme for nonminimal adaptive wormhole routing. 465-486
  
• Stavros D. Nikolopoulos, Stylianos D. Danielopoulos:
  Odd-even, compare-exchange parallel sorting. 487-497
  
• S. Sarkar, A. K. Majumdar, R. K. Sen:
  Enhanced systolic array implementations of some graph problems. 499-520
  

Volume 40, Number 8, October 1994

• E. D. Adamides, Phillipos G. Tsalides, Adonios Thanailakis:
  Bit-serial VLSI sorter with high reliability specifications. 523-536
  
• R. Chandrasekharam, V. V. Vinod, S. Subramanian:
  Genetic algorithm for embedding a complete graph in a hypercube with a VLSI application. 537-552
  
• Santonu Sarkar, Arun K. Majumdar, Anupam Basu:
  Interface design and controller synthesis of digital systems in an object oriented environment. 553-576
  
• R. Venugopal, Y. N. Srikant:
  Scheduliing expression trees with register variables on delayed-load architectures. 577-596
  

Volume 40, Number 9, November 1994

• Peter R. Dietmüller:
  Virus protection using dynamic linking. 599-604
  
• B. Gopal, S. Manohar:
  VLSI architecture for the Winograd Fourier transform algorithm. 605-616
  
• Meenakshisundaram Gopi, Swami Manohar:
  VLSI architectures for the computation of uniform B-spline curves. 617-626
  
• Byungyeon Hwang, Songchun Moon:
  Design and evaluation of access method for multi-dimensional objects in spatial databases. 627-650
  
• Paul P. Ignatius, C. Siva Ram Murthy:
  Optimal scheduling of independent jobs in multiprocessor systems. 651-672
  

Volume 40, Numbers 10-12, December 1994

• Roger Collins, Gordon Steven:
  An explicitly declared delayed-branch mechanism for a superscalar architecture. 677-680
  
• Minsuk Lee, Sang Lyul Min, Chong-Sang Kim:
  A worst case timing analysis technique for instruction prefetch buffers. 681-684
  
• C. Bailey, R. Sotudeh:
  HLL enhancement for stack based processors. 685-688
  
• Edil S. Tavares Fernandes, Anna Dolejsi Santos, Claudio Luis de Amorim:
  Conditional execution: an approach for eliminating the basic block barriers. 689-692
  
• Anna Antola, Fausto Distante, Andrea Marchese:
  High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs. 693-696
  
• Jos Nijhuis, Herman van Aartsen, Emilia I. Barakova, Walter J. Jansen, Lambert Spaanenburg:
  On the optimal mapping of fuzzy rules on standard micro-controllers. 697-700
  
• J. Miskolczi, Ta Manh Dung, K. Tarnay, J. Szabó:
  Conformance testing of X-25 packet level. 703-705
  
• Marjeta Pucko, Monika Kapus-Kolar, Gorazd Kandus:
  Automated derivation of protocols implementing intelligent network services. 707-710
  
• Maria Töro, Gábor Ziegler:
  Validation of abstract test suites with use of SDL. 711-714
  
• Ana Maria Ponce:
  Documenting the process of conformance testing. 715-717
  
• Gusztáv Adamis:
  Automatic Protocol implementation - generating C++ code from SDL/PR specifications. 719-722
  
• P. Brudlo, H. Krawczyk:
  A concept of a fully distributed processing strategy oriented for unix local area networks. 723-726
  
• Kyuho Kim, Kyoung-In Kwon, Songchun Moon:
  Development of object-oriented database management system: OOIM. 729-732
  
• Yonglak Sohn, Sukhoon Kang, Songchun Moon:
  Concurrency control scheme in multi-level secure database management systems. 733-736
  
• Yong-Kee Paek, Jungyun Seo, Gil-Chang Kim:
  Constructing a domain dependent case-base for database schema design with case-based reasoning. 737-741
  
• Kiyoung Kim, Jonghyun Lee, Songchun Moon:
  Scheduling cooperative transactions in distributed database systems. 743-746
  
• Youngkon Lee, Songchun Moon:
  Cost-optimal dynamic data replication for distributed database systems: DYVO. 747-750
  
• Sang-Koo Seo, Yoon-Joon Lee:
  Optimal evaluation of path predicates in object-oriented queries. 751-754
  
• Inhwan Jung, Kisoo Han, Songchun Moon:
  Middleware transaction manager in multidatabase management systems. 755-758
  
• Hyeokmin Kwon, Songchun Moon:
  Reverse serializability as a correctness criterion for optimistic concurrency control. 759-762
  
• Andrea Clematis:
  Fault tolerant programming for network based parallel computing. 765-768
  
• Franz Schönbauer:
  Database cache requirements calculation using near-line data access traces in a 500+ user transaction system. 769-772
  
• J. C. Quill, Peter Milligan, R. K. McConnell:
  A knowledge based approach to loop restructuring. 773-776
  
• Miroslaw Thor:
  HP-FLEXAR: A reconfigurable multi-unit heterogeneous topology architecture for time critical applications. 777-781
  
• Patrick Bonnin, Edwige E. Pissaloux, Tharam S. Dillon:
  Towards a definition of benchmarks for parallel computers dedicated to image processing/understanding. 783-787
  
• Tino Pyssysalo:
  Proving properties of a new high speed data bus with predicate/transition nets. 791-794
  
• Roman Novak, Gorazd Kandus:
  Adaptive Steiner tree balancing in distributed algorithm for multicast connection setup. 795-798
  
• Vittoria Gianuzzi:
  Coupling algorithms for replicated objects and processes. 799-802
  
• Gianfranco Ciccarella, Frédéric Patricelli:
  Performance evaluation of a distributed system architecture. 803-806
  
• Matthew J. Jubb, Alan Purvis:
  Analysis of network protocol performance in the context of multi-workstation parallel distributed applications. 807-810
  
• Audrey Mayes, Bob Dickerson, Carol Britton:
  Implementing associations between objects. 811-814
  
• Evaggelinos P. Mariatos, P. Merakos, Michael K. Birbas, Alexios N. Birbas:
  Hardware programming using C++. 817-820
  
• Hortensia Mecha, Milagros Fernández, Román Hermida, Daniel Mozos, Katzalin Olcoz:
  Clock cycle estimation based on dead time and control unit area minimization. 821-824
  
• J. M. Fernández, F. Moreno, S. Alexandres, J. Meneses:
  A flexible VLSI-based hardware system for medium-large-vocabulary real-time speech recognition. 825-828
  
• Anna Tatsaki, Costas E. Goutis:
  A bit-serial VLSI architecture for the 2-D discrete cosine transform. 829-832
  
• Massimo Bartolucci, Giacomo R. Sechi:
  Rounding error in the computation of opposite sign floating point number parametric addition: a case study. 833-839
  
• Fabrizio Ferrandi:
  Reduction of fault detection costs through a BDD formalism. 841-844
  
• D. Q. M. Fay:
  Internet and the electronic classroom. 847-850
  
• Stuart K. MacGlashan, Malcolm J. Taylor, Roy Rada:
  A hypermedia data model for public space and computer aided learning. 851-854
  
• Ioannis D. Zaharakis, Achilles D. Kameas, Panayiotis E. Pintelas:
  MeT: The expert methodology tutor of GENITOR. 855-860
  
• Colin C. Charlton, Paul E. Dunne, Paul H. Leng, Janet Little, M. R. Woodward:
  Distributing quality-controlled software via the internet. 861-864
  
• D. A. Sanders, A. D. Hudson, H. Cawte, O. Fenske, G. A. Poland, G. E. Tewkesbury:
  Computer modelling of single sludge systems for the computer aided design and control of activated sludge processes. 867-870
  
• Zdenek Blazek:
  Multiprocessor flight data acquisition system. 871-874
  
• A. Femminella, A. Omodeo:
  PVM-based parallel computing: a case study on power plant simulation. 875-878
  
• Miroslav Svéda, Radimir Vrba, Pavel Legát, Frantisek Zezulka:
  ASI Instrumentation. 879-882
  
• George-Peter K. Economou, N. M. Economopoulos, Dimitris K. Lymberopoulos, Constantinos E. Goutis:
  Experiences accumulated working towards medical decision support systems. 883-886
  
• Miroslav Svéda:
  Design and development of industrial measurement system - Architecture and software. 887-889
  
• József Györkös:
  Measurements in software requirements specification process. 893-896
  
• Alexander Romanovsky:
  The problems of designing a conversation scheme for concurrent object oriented languages. 897-900
  
• Jarogniew Rykowski, Waldemar Wieczerzycki:
  Using versioned object-oriented data in programming languages. 901-904
  
• Iztok Savnik, Tomaz Mohoric, Vanja Josifovski:
  Extending database programming language with declarative querying facilities. 905-908
  
• Mats Larsson:
  Towards amalgamating high-level synthesis and proof systems. 909-912
  
• Hoon Chang, Jacob A. Abraham:
  An efficient critical path tracing algorithm for sequential circuits. 913-916
  
• Isidro Verdú, Domingo Giménez, J. J. Sánchez:
  Three dimensional image synthesis in transputers. 919-922
  
• Kalman Fazekas:
  Multiresolution image decomposition with wavelet transform. 923-926
  
• Chrissavgi Dre, George Branis, Costas E. Goutis:
  Image coding using vector quantization of wavelet coefficients. 927-930
  
• I. Erényi, Z. Fazekas:
  Morphological evaluation of embryo viability. 931-934
  
• V. Gustin, J. Virant:
  Pattern recognition with fuzzy neural network. 935-938
  
• Rafael Dueire Lins, Mário Guimarães Neto, Leopoldo França Neto, Luciano Galdino Rosa:
  An environment for processing images of historical documents. 939-942
  

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