Volume 43,
Numbers 1-5,
March 1997
- Kurt P. Judmann:
EUROMICRO 1995 - Short Contributions.
1-5
- Stefan A. Kühn, Michael B. Kleiner, Werner Weber:
Multiparallel systolic arrays for multidimensional FFT-architectures on 3D-VLSI.
7-14
- Alberto Ferreira de Souza, Edil S. Tavares Fernandes, Andrew Wolfe:
On the balance of VLIW architectures.
15-22
- István Vassányi:
FPGAs and cellular algorithms: Two implementation examples.
23-26
- Marek Tudruj:
Dynamically reconfigurable heterogeneous multi-processor systems with transputer-controlled communication.
27-32
- José M. Fernández, Félix Moreno, Juan M. Meneses:
An approach to the design of RISC core processors for VLSI embedded systems.
33-37
- Simon A. Trainis:
Modelling the hardware cost of full register bypassing in a multiple instruction issue processor.
39-46
- Miroslav Svéda:
Design method, fail-stop safety model, and embedded application.
47-57
- A. D. Hudson, D. A. Sanders, H. Golding, G. E. Tewkesbury, H. Cawte:
Aspects of an expert design system for the wastewater treatment industry.
59-65
- I. J. Stott, D. A. Sanders, M. J. Goodwin:
A software algorithm for the intelligent mixing of inputs to a tele-operated vehicle.
67-72
- M. J. Goodwin, D. A. Sanders, G. A. Poland, I. J. Stott:
Navigational assistance for disabled wheelchair-users.
73-79
- Gregor Vrecko, Zmago Brezocnik, Tatjana Kapus, Bogomir Horvat, Andrej Duh:
Microcomputer unit for control of distributed devices over computer networks.
81-85
- Erik Stoy, Zebo Peng:
Inter-domain movement of functionality as a repartitioning strategy for hardware/software co-design.
87-98
- Karl M. Göschka:
Generation of firmwarecompilers.
99-109
- Byung-gi Kim, Hoon Chang, Jung Wan Cho:
Methodology for ensuring high reliability of VLSI systems.
111-117
- Jordi Riera, Lluis Ribas, A. Josep Velasco, Jordi Carrabina:
Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis.
119-122
- Juraj Povazanec, Vladislav Musil:
Fault and test-process modelling for integrated circuits.
123-127
- Manuel L. Anido, C. E. T. Oliveira, Vladimir C. Alves:
An environment to perform functional tests on boards and integrated circuits.
129-134
- Gabriella Dodero, R. Valia:
Pipelined programming in PVM.
135-141
- Miroslaw Thor:
A multi-thread approach reducing program execution time in a heterogeneous reconfigurable multi-processor architecture.
143-153
- Doron Darmon, Helnye Azaria:
Asynchronous Process Simulator for Parallel Systems (APSPS) 1.
155-162
- Ferenc Vajda:
Implementation issues of the Hough Transform.
163-165
- Giulio Iannello, Stefano Russo:
PVM communication performance over an ATM MAN.
167-173
- Donghee Lee, Youngtack Jin, Yookun Cho:
Fast networking based on the STREAMS mechanism with fast module scheduling.
175-184
- Youngsong Mun, Kyung-Sun Min, Youngsik Kim:
Performance evaluation of switching networks.
185-188
- Joshua Etkin:
Language-based communication protocols for distributed systems.
189-191
- Gianfranco Ciccarella, Giuseppe Donatelli, Roberto Piermarini:
A nonlinear predistortion technique for radio channels: Algorithms and implementation problems.
193-198
- Jürgen Lampe:
A tool for syntax directed software design.
199-202
- Viljem Zumer, Nikolaj Korbar, Marjan Mernik:
Automatic implementation of programming languages using object oriented approach.
203-210
- Jakob Axelsson:
A portable model for predicting the size and execution time of programs.
211-213
- Waldemar Wieczerzycki:
Advanced versioning mechanisms supporting CSCW environments.
215-227
- George Samaras, Andrew Citron, Ajay D. Kshemkalyani:
Reconciling chained and unchained transactional support for distributed systems.
229-243
- Taekyung Byun, Songchun Moon:
Nonblocking two-phase commit protocol to avoid unnecessary transaction abort for distributed systems.
245-254
- Youngkon Lee, Songchun Moon:
Dynamic replication control scheme using logical configuration information: DYRECT.
255-266
- Wonsup Lee, Haengrae Cho, Songchun Moon:
Group-oriented catalog allocation in heterogeneous distributed database systems.
267-276
- Hyeokman Kim, Sukho Lee, Hyoung-Joo Kim:
A cost model for sort-domain traversal strategy in object-oriented databases.
277-283
- Hwan-Seung Yong, Sukho Lee:
A storage structure for nested relations using signatures.
285-290
- Krzysztof Goczyla:
Exploiting class hierarchy for effective parallelisation of processing in object-oriented database systems.
291-295
- Kisoo Han, Songchun Moon:
Group checkpointing scheme for partition failure recovery in mobile database systems: GCS/MD.
297-305
- Hyung-Il Choi, Gye-Young Kim:
Motion interpretation by analyzing difference images.
307-316
- Massimo Bertozzi, Alberto Broggi, Stefano Castelluccio:
A real-time oriented system for vehicle detection.
317-325
- S. L. Chen, E-ren Chuang, W. S. Hsieh:
VISUAL: An object oriented language for image understanding.
327-335
- Desmond Phillips, Alan Purvis, Simon Johnson:
On an efficient VLSI architecture for the multirate additive synthesis of musical tones.
337-340
- Andrew M. Tyrrell, Tim S. Brookes, David M. Howard:
T9000 and T800 transputers: A real-time application.
341-344
- Mohamed Ould-Khaoua, Reza Sotudeh:
Performance evaluation of hypermeshes and meshes with wormhole routing.
345-353
- Youngsik Kim, Oh-Young Kwon, Tack-Don Han, Youngsong Mun:
Design and performance analysis of the Practical Fat Tree Network using a butterfly network.
355-363
- Dragana Milutinovic:
Mapping of interconnection networks for parallel processing onto the advanced sea-of-gates VLSI.
365-370
Volume 43,
Numbers 6-7,
April 1997
- Giacomo R. Sechi:
Massively parallel systems.
371-372
- Sam Lor, Hong Shen, Piyush Maheshwari:
Divide-and-conquer mapping of parallel programs onto hypercube computers.
373-390
- Tut San Guan, Talib Alukaidey, Silvano P. V. Barros:
An MPP reconfigurable architecture using free-space optical interconnects and Petri net configuring.
391-402
- F. Paganelli, Stephen C. Winter, Derek R. Wilson:
A framework for virtually transparent monitoring of parallel programs.
403-423
- Gábor Németh:
Scheduling problems in general purpose massively parallel systems.
425-435
- Fabrizio Baiardi, Antonio Candelieri, Laura Ricci:
Massively parallel execution of logic programs: A static approach.
437-457
- K. Voliotis, George Manis, Ch. Lekatsas, Panayotis Tsanakas, George K. Papakonstantinou:
Orchid: A portable platform for parallel programming.
459-478
- Vjekoslav Sinkovic, Ignac Lovrek:
A model of massively parallel call and service processing in telecommunications.
479-490
- Sivarama P. Dandamudi, Philip S. P. Cheng:
Performance impact of run queue organization and synchronization on large-scale NUMA multiprocessor systems.
491-511
Volume 43,
Number 8,
May 1997
- Dongwook Kim, Joonwon Lee, Seungkyu Park:
A partitioned on-chip virtual cache for fast processors.
519-531
- Felix Pérez, Jesús Carretero, Francisco García, Pedro de Miguel, L. Alonso:
Evaluating ParFiSys: A high-performance parallel and distributed file system.
533-542
- Michele Angelaccio, Michele Colajanni:
Dynamic data decomposition in a message-passing environment.
543-556
- Rajesh K. Gupta, Giovanni De Micheli:
Constrained software synthesis for embedded applications.
557-586
- Massimo Bartolucci, Paolo Guazzoni, Giorgio Manfredi, Giacomo R. Sechi, Luisa Zetta:
Computation of numerical algorithms with parametric floating point operators.
587-599
Volume 43,
Number 9,
August 1997
Volume 43,
Number 10,
1997
- Andrew M. Tyrrell:
Dependable parallel computer systems.
667-669
- Nicola Mazzocca, Stefano Russo, Valeria Vittorini:
Formal methods integration for the specification of dependable distributed systems.
671-685
- Alexander Romanovsky, Brian Randell, Robert J. Stroud, Jie Xu, Avelino Francisco Zorzo:
Implementation of blocking coordinated atomic actions based on forward error recovery.
687-699
- Jyh-Tzong Chiou, Charles Changli Chin, Shang-Rong Tsai:
A fault tolerant RPC mechanism based on IP multicasting.
701-717
- Gianluca Tempesti, Daniel Mange, André Stauffer:
A robust multiplexer-based FPGA inspired by biological systems.
719-733
- Clive H. Pygott, Stephen P. Wilson:
Justifying reliability claims for a fault-detecting parallel architecture.
735-751
Copyright © Mon Nov 16 23:36:31 2009
by Michael Ley (ley@uni-trier.de)
