Volume 28, Number 1, February 2004
- Paula Doyle, Donal Heffernan, D. Duma:
A time-triggered transducer network based on an enhanced IEEE 1451 model.
- Zoran A. Salcic, Partha S. Roop, Morteza Biglari-Abhari, Abbas Bigdeli:
REFLIX: a processor core with native support for control-dominated embedded applications.
- Tomer Karin, Shlomo Weiss:
Programming Windows NT device drivers to operate non-interrupting embedded devices.
- K. Banerjee, B. Dam, K. Majumdar, R. Banerjee, D. Patranabis:
A carrier peak synchronous direct digital demodulation technique and its FPGA implementation.
Volume 28, Number 2, March 2004
Volume 28, Number 3, April 2004
Volume 28, Number 4, May 2004
- Chao-Chin Wu:
Embedding a superscalar processor onto a chip multiprocessor.
- Javier Gaspar, Suei Feng Chen, Alejandro Gordillo, Mateo Hepp, Pablo Ferreyra, Carlos A. Marqués:
Digital lock in amplifier: study, design and development with a digital signal processor.
- Ola Redell, Jad El-khoury, Martin Törngren:
The AIDA toolset for design and implementation analysis of distributed real-time control systems.
- Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese:
Exploring the design-space for FPGA-based implementation of RSA.
Volume 28, Numbers 5-6, August 2004 Special Issue on FPGAs:
Applications and Designs
- Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez, Juan Antonio Gómez Pulido:
Guest editors' introduction - Special issue on FPGAs: applications and designs.
- Valery Sklyarov:
FPGA-based implementation of recursive algorithms.
- Tom Van Court, Martin C. Herbordt, Richard J. Barton:
Case study of a functional genomics application for an FPGA-based coprocessor.
- Aristides Nikologiannis, Ioannis Papaefstathiou, George Kornaros, Christopher Kachris:
An FPGA-based queue management system for high speed networking devices.
- Paul Berube, Mike H. MacGregor, José Nelson Amaral:
FPGA implementation and experimental evaluation of a multizone network cache.
- Alan Daly, William P. Marnane, Tim Kerins, Emanuel M. Popovici:
An FPGA implementation of a GF(p) ALU for encryption processors.
- Furi Andi Karnapi, Woon-Seng Gan, Yong Kim Chong:
FPGA implementation of parametric loudspeaker system.
- Leonardo Maria Reyneri:
A Simulink-based hybrid codesign tool for rapid prototyping of FPGA's in signal processing systems.
- Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs.
- José Albaladejo, David de Andrés, Lenin Lemus, Joaquim Salvi:
Codesign methodology for computer vision applications.
- Alireza Ejlali, Seyed Ghassem Miremadi:
FPGA-based fault injection into switch-level models.
- Francisco Rodríguez-Henríquez, Nazar A. Saqib, Arturo Díaz-Pérez:
A fast parallel implementation of elliptic curve point multiplication over GF(2m).
- Young-Su Kwon, Chong-Min Kyung:
Scheduling driven circuit partitioning algorithm for multiple FPGAs using time-multiplexed, off-chip, multi-casting interconnection architecture.
Volume 28, Number 7, September 2004
Volume 28, Number 8, October 2004 Resource Management in Wireless and Adhoc mobile networks
- Jayasree Dattagupta, Nabanita Das:
- Jagoba Arias, Aitzol Zuloaga, Jesús Lázaro, Jon Andreu, Armando Astarloa:
Malguki: an RSSI based ad hoc location algorithm.
- Swarup Mandal, Debashis Saha, Ambuj Mahanti:
A real-time heuristic search technique for fixed channel allocation (FCA) in mobile cellular communications.
- Sajal K. Das, Osman Koyuncu:
Dynamic multi-channel assignment using network flows in wireless data networks.
- Subhankar Dhar, Michael Q. Rieck, Sukesh Pai, Eun Jik Kim:
Distributed routing schemes for ad hoc networks using d-SPR sets.
- Vasu Jolly, Naoto Kimura, Shahram Latifi, Pradip K. Srimani:
Loop detection in MPLS for wireless sensor networks.
- Lalit M. Patnaik, S. Hasan Raza Naqvi:
A review of medium access protocols for mobile ad hoc networks with transmission power control.
- Yu-Chee Tseng, Ten-Yueng Hsieh:
An architecture for power-saving communications in a wireless mobile ad hoc network based on location information.
- Wei Ding, S. Sitharama Iyengar, Rajgopal Kannan, William Rummler:
Energy equivalence routing in wireless sensor networks.
Volume 28, Number 9, November 2004
- Sarp Oral, Alan D. George:
Multicast performance modeling and evaluation for high-speed unidirectional torus networks.
- M. J. Er, Tien Peng Tan, Sin Yee Loh:
Control of a mobile robot using generalized dynamic fuzzy neural networks.
- Ali Elkateeb, Paul Richardson, Adnan Shaout, Afzal Hussain, Mohammed Elbeshti:
Scalable ATM network interface design using parallel RISC processors architecture.
- Ricardo José Colom-Palero, Rafael Gadea Gironés, Francisco Ballester, Marcos Martínez Peiró:
Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices.
Volume 28, Number 10, December 2004 Secure Computing Platforms
Last update Fri May 24 17:39:58 2013
CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page
- Aman Garg, A. L. Narasimha Reddy:
Mitigation of DoS attacks through QoS regulation.
- Y. C. Jiang, Z. Y. Xia, Y. P. Zhong, S. Y. Zhang:
Defend mobile agent against malicious hosts in migration itineraries.
- Yingfei Dong, Changho Choi, Zhi-Li Zhang:
A security framework for protecting traffic between collaborative domains.
- Ioannis Papaefstathiou, Vassilis Papaefstathiou, C. Sotiriou:
Design-space exploration of the most widely used cryptography algorithms.
- Darshan Sonecha, Bo Yang, Ramesh Karri, David A. McGrew:
High speed architectures for Leviathan: a binary tree based stream cipher.
- Peifeng Ni, Zhiyuan Li:
Energy cost analysis of IPSec on handheld devices.