Volume 29,
Number 1,
January/February 2009
- Shane M. Greenstein:
Symptoms of Healthy Innovativeness.
3-5
- Joel S. Emer, Dean M. Tullsen:
Guest Editors' Introduction: Top Picks from the 2008 Computer Architecture Conferences.
6-9
- Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Pradeep Dubey, Stephen Junkins, Adam Lake, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Michael Abrash, Jeremy Sugerman, Pat Hanrahan:
Larrabee: A Many-Core x86 Architecture for Visual Computing.
10-21
- Onur Mutlu, Thomas Moscibroda:
Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Shared Memory Controllers.
22-32
- John Kim, William J. Dally, Steve Scott, Dennis Abts:
Cost-Efficient Dragonfly Topology for Large-Scale Systems.
33-40
- Kevin T. Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant D. Patel, Trevor N. Mudge, Steven K. Reinhardt:
Server Designs for Warehouse-Computing Environments.
41-49
- Sudhanva Gurumurthi, Sriram Sankar, Mircea R. Stan:
Using Intradisk Parallelism to Build Energy-Efficient Storage Systems.
50-61
- Shimin Chen, Michael Kozuch, Phillip B. Gibbons, Michael P. Ryan, Theodoros Strigkos, Todd C. Mowry, Olatunji Ruwase, Evangelos Vlachos, Babak Falsafi, Vijaya Ramachandran:
Flexible Hardware Acceleration for Instruction-Grain Lifeguards.
62-72
- Brandon Lucia, Joseph Devietti, Luis Ceze, Karin Strauss:
Atom-Aid: Detecting and Surviving Atomicity Violations.
73-83
- James Tuck, Wonsun Ahn, Josep Torrellas, Luis Ceze:
SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization.
84-95
- Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu:
Trading Off Cache Capacity for Low-Voltage Operation.
96-103
- Renée St. Amant, Daniel A. Jiménez, Doug Burger:
Mixed-Signal Approximate Computation: A Neural Predictor Case Study.
104-115
- Eren Kursun, Chen-Yong Cher:
Temperature Variation Characterization and Thermal Management of Multicore Architectures.
116-126
- Xiaoyao Liang, Gu-Yeon Wei, David Brooks:
Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency.
127-138
- Richard H. Stern:
One of the Last Updates on Rambus Standardization Skullduggery.
139-143
- Richard Mateosian:
System Green.
144-147
Volume 29,
Number 2,
March/April 2009
- Shane M. Greenstein:
Building Broadband as Economic Stimulus.
2-3
- Christos Kozyrakis, Jan-Willem van de Waerdt:
Guest Editors' Introduction: Hot Chips Turns 20.
4-5
- Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Håkan Zeffer, Marc Tremblay:
Rock: A High-Performance Sparc CMT Processor.
6-16
- Weiwu Hu, Jian Wang, Xiang Gao, Yunji Chen, Qi Liu, Guojie Li:
Godson-3: A Scalable Multicore RISC Processor with x86 Emulation.
17-29
- Richard Selvaggi, Larry Pearlstein:
Broadcom mediaDSP: A Platform for Building Programmable Multicore Video Processors.
30-45
- Dan Mansur:
A New 40-nm FPGA and ASIC Common Platform.
46-53
- Lloyd Watts, Dana Massie, Allen Sansano, Jim Huey:
Voice Processors Based on the Human Hearing System.
54-63
- Richard Stern:
IEEE-USA Tells Congress that Patent Reform Is Essential to Economic Recovery.
64-65
- Richard Mateosian:
No More Wishful Thinking.
68-71
Volume 29,
Number 3,
May/June 2009
- Shane M. Greenstein:
The Revolution in Spectrum Allocation.
4-6
- Markus Levy, Thomas M. Conte:
Embedded Multicore Processors and Systems.
7-9
- Thomas B. Berg:
Maintaining I/O Data Coherence in Embedded Multicore Systems.
10-19
- Jiang Xu, Wayne Wolf, Wei Zhang:
Double-Data-Rate, Wave-Pipelined Interconnect for Asynchronous NoCs.
20-30
- Jean-Yves Mignolet, Rogier Baert, Thomas J. Ashby, Prabhat Avasare, Hye-On Jang, Jae Cheol Son:
MPA: Parallelizing an Application onto a Multicore Platform Made Easy.
31-39
- Jim Holt, Anant Agarwal, Sven Brehmer, Max J. Domeika, Patrick Griffin, Frank Schirrmeister:
Software Standards for the Multicore Era.
40-51
- Feng Wang, Mounir Hamdi:
Memory Subsystems in High-End Routers.
52-63
- Richard Mateosian:
Software Architects.
62-64
Volume 29,
Number 4,
July/August 2009
- Shane M. Greenstein:
Micro Economics: Soccer Mom Messaging Is the Poetry of Our Age.
2-3
- Keren Bergman, Ron Brightwell, Fabrizio Petrini:
Guest Editors' Introduction: Hot Interconnects.
5-7
- Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic:
Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics.
8-21
- Nikos Chrysos, Giorgos Dimitrakopoulos:
Practical High-Throughput Crossbar Scheduling.
22-35
- John R. Feehrer, Paul Rotker, Milton Shih, Paul Gingras, Peter Yakutis, Stephen Phillips, John Heath:
Coherency Hub Design for Multisocket Sun Servers with CoolThreads Technology.
36-47
- Tushar Krishna, Amit Kumar, Li-Shiuan Peh, Jacob Postman, Patrick Chiang, Mattan Erez:
Express Virtual Channels with Capacitively Driven Global Links.
48-61
- Michael R. T. Tan, Paul Rosenberg, Jong Souk Yeo, Moray McLaren, Sagi Mathai, Terry Morris, Huei Pei Kuo, Joseph Straznicky, Norman P. Jouppi, Shih-Yuan Wang:
A High-Speed Optical Multidrop Bus for Computer Interconnections.
62-73
- Michele Petracca, Benjamin G. Lee, Keren Bergman, Luca P. Carloni:
Photonic NoCs: System-Level Design Exploration.
74-85
- Richard H. Stern:
Micro Law: An End to the Rambus Skullduggery Saga.
86
- Richard Mateosian:
Micro Review: Twitter.
87-88
Volume 29,
Number 5,
September/October 2009
- David H. Albonesi:
From the Editor in Chief: Welcome A-Board.
2-5
- Shane M. Greenstein:
Micro Economics: Does Google Have Too Much Money?.
6-7
- José F. Martínez, Engin Ipek:
Dynamic Multicore Resource Management: A Machine Learning Approach.
8-17
- Jason A. Poovey, Thomas M. Conte, Markus Levy, Shay Gal-On:
A Benchmark Characterization of the EEMBC Benchmark Suite.
18-29
- Tran Nguyen Bao Anh, Su-Lim Tan:
Real-Time Operating Systems for Small Microcontrollers.
30-45
- Hsiang-Ning Liu, Yu-Jen Huang, Jin-Fu Li:
Memory Built-in Self Test in Multicore Chips with Mesh-Based Networks.
46-55
- Ying-Dar Lin, Po-Ching Lin, Yuan-Cheng Lai, Tai-Ying Liu:
Hardware-Software Codesign for High-Speed Signature-based Virus Scanning.
56-65
- Richard Mateosian:
Micro Review: Life and Work.
66-68
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