Volume 4, Number 1, March 2007
- Brad Calder, Dean M. Tullsen:
Introduction.
- Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky:
Architecting a reliable CMP switch architecture.
- Ruchira Sasanka, Man-Lap Li, Sarita V. Adve, Yen-Kuang Chen, Eric Debes:
ALP: Efficient support for all levels of parallelism for complex media applications.
- Yan Luo, Jia Yu, Jun Yang, Laxmi N. Bhuyan:
Conserving network processor power consumption by exploiting traffic variability.
- Vassos Soteriou, Noel Eisley, Li-Shiuan Peh:
Software-directed power-aware interconnection networks.
- Yuan-Shin Hwang, Jia-Jhe Li:
Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties.
- Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao:
Single-dimension software pipelining for multidimensional loops.
Volume 4, Number 2, June 2007
- Fred A. Bower, Daniel J. Sorin, Sule Ozev:
Online diagnosis of hard faults in microprocessors.
- Pierre Michaud, André Seznec, Damien Fetis, Yiannakis Sazeides, Theofanis Constantinou:
A study of thread migration in temperature-constrained multicores.
- Yu Chen, Fuxin Zhang:
Code reordering on limited branch offset.
- Andrei Terechko, Henk Corporaal:
Inter-cluster communication in VLIW architectures.
- Jialin Dou, Marcelo H. Cintra:
A compiler cost model for speculative parallelization.
- Wolfram Amme, Jeffery von Ronne, Michael Franz:
SSA-based mobile code: Implementation and empirical evaluation.
Volume 4, Number 3, September 2007
- Xiaodong Li, Ritu Gupta, Sarita V. Adve, Yuanyuan Zhou:
Cross-component energy management: Joint adaptation of processor and memory.
- Ron Gabor, Shlomo Weiss, Avi Mendelson:
Fairness enforcement in switch on event multithreading.
- Diego Andrade, Basilio B. Fraguela, Ramon Doallo:
Precise automatable analytical modeling of the cache behavior of codes with indirections.
- Kris Venstermans, Lieven Eeckhout, Koen De Bosschere:
Java object header elimination for reduced memory consumption in 64-bit virtual machines.
- Shu Xiao, Edmund Ming-Kit Lai:
VLIW instruction scheduling for minimal power variation.
- Sriraman Tallam, Rajiv Gupta:
Unified control flow and data dependence traces.
Volume 4, Number 4, January 2008
- Engin Ipek, Sally A. McKee, Karan Singh, Rich Caruana, Bronis R. de Supinski, Martin Schulz:
Efficient architectural design space exploration via predictive modeling.
- Yunhe Shi, Kevin Casey, M. Anton Ertl, David Gregg:
Virtual machine showdown: Stack versus registers.
- Jun Yan, Wei Zhang:
Exploiting virtual registers to reduce pressure on real registers.
- Zoe C. H. Yu, Francis C. M. Lau, Cho-Li Wang:
Object co-location and memory reuse for Java programs.
- Chuanjun Zhang:
Reducing cache misses through programmable decoders.
- Amit Golander, Shlomo Weiss:
Hiding the misprediction penalty of a resource-efficient high-performance processor.
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