IEEE Transactions on Computers, Volume 61

Volume 61, Number 1, 2012

• Albert Y. Zomaya:
  State of the Journal. 1-2
  
• Tania Mishra, Sartaj Sahni:
  PETCAM - A Power Efficient TCAM Architecture for Forwarding Tables. 3-17
  
• Anat Bremler-Barr, Danny Hendler:
  Space-Efficient TCAM-Based Classification Using Gray Coding. 18-30
  
• Vinay Devadas, Hakan Aydin:
  On the Interplay of Voltage/Frequency Scaling and Device Power Management for Frame-Based Real-Time Embedded Applications. 31-44
  
• Woochul Kang, Sang Hyuk Son, John A. Stankovic:
  Design, Implementation, and Evaluation of a QoS-Aware Real-Time Embedded Database. 45-59
  
• Manish Kumar Jaiswal, Nitin Chandrachoodan:
  FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture. 60-72
  
• Minje Jun, Deumji Woo, Eui-Young Chung:
  Partial Connection-Aware Topology Synthesis for On-Chip Cascaded Crossbar Network. 73-86
  
• Ioannis Doudalis, James A. Clause, Guru Venkataramani, Milos Prvulovic, Alessandro Orso:
  Effective and Efficient Memory Protection Using Dynamic Tainting. 87-100
  
• Yingpeng Sang, Hong Shen, Hui Tian:
  Effective Reconstruction of Data Perturbed by Random Projections. 101-117
  
• Habib M. Ammari, Sajal K. Das:
  Centralized and Clustered k-Coverage Protocols for Wireless Sensor Networks. 118-133
  
• Seung-Ho Park, Jung-Wook Park, Shin-Dug Kim, Charles C. Weems:
  A Pattern Adaptive NAND Flash Memory Storage Structure. 134-138
  

Volume 61, Number 2, February 2012

• Albert Y. Zomaya:
  State of the Journal. 145-150
  
• M. Anwar Hasan, Nicolas Meloni, Ashkan Hosseinzadeh Namin, Christophe Nègre:
  Block Recombination Approach for Subquadratic Space Complexity Binary Field Multiplication Based on Toeplitz Matrix-Vector Product. 151-163
  
• Ashkan Hosseinzadeh Namin, Huapeng Wu, Majid Ahmadi:
  High-Speed Architectures for Multiplication Using Reordered Normal Basis. 164-172
  
• Haridimos T. Vergos, Giorgos Dimitrakopoulos:
  On Modulo 2^n+1 Adder Design. 173-186
  
• Michael N. Skoufis, Spyros Tragoudas:
  An Online Failure Detection Method for Data Buses Using Multithreshold Receiving Logic. 187-198
  
• Chi-Neng Wen, Shu-Hsuan Chou, Chien-Chih Chen, Tien-Fu Chen:
  NUDA: A Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems. 199-212
  
• SangKyun Yun:
  An Efficient TCAM-Based Implementation of Multipattern Matching Using Covered State Encoding. 213-221
  
• Andrea Marongiu, Luca Benini:
  An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs. 222-236
  
• Nikola Vujic, Felipe Cabarcas, Marc González Tallada, Alex Ramírez, Xavier Martorell, Eduard Ayguadé:
  DMA++: On the Fly Data Realignment for On-Chip Memories. 237-250
  
• Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero:
  CPU Accounting for Multicore Processors. 251-264
  
• Miao Zhao, Yuanyuan Yang:
  Bounded Relay Hop Mobile Data Gathering in Wireless Sensor Networks. 265-277
  
• Chia-Wei Lee, Sun-Yuan Hsieh:
  Pancyclicity of Matching Composition Networks under the Conditional Fault Model. 278-183
  
• Earl E. Swartzlander Jr., Hani Saleh:
  FFT Implementation with Fused Floating-Point Operations. 284-288
  

Volume 61, Number 3, March 2012

• Peter Kornerup, Vincent Lefèvre, Nicolas Louvet, Jean-Michel Muller:
  On the Computation of Correctly Rounded Sums. 289-298
  
• Monireh Houshmand, Saied Hosseini-Khayat, Mark M. Wilde:
  Minimal-Memory Requirements for Pearl-Necklace Encoders of Quantum Convolutional Codes. 299-312
  
• Luis Entrena, Mario García-Valderas, Raúl Fernández Cardenal, Almudena Lindoso, Marta Portela-García, Celia López-Ongil:
  Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection. 313-322
  
• Eric P. Kim, Naresh R. Shanbhag:
  Soft N-Modular Redundancy. 323-336
  
• Xin Li, Reinhard von Hanxleden:
  Multithreaded Reactive Programming - the Kiel Esterel Processor. 337-349
  
• Lei Shi, Bin Liu, Changhua Sun, Zhengyu Yin, Laxmi N. Bhuyan, H. Jonathan Chao:
  Load-Balancing Multipath Switching System with Flow Slice. 350-365
  
• Guiming Wu, Yong Dou, Junqing Sun, Gregory D. Peterson:
  A High Performance and Memory Efficient LU Decomposer on FPGAs. 366-378
  
• Georgina Cosma, Mike Joy:
  An Approach to Source-Code Plagiarism Detection and Investigation Using Latent Semantic Analysis. 379-394
  
• Steven de Rooij, Paul M. B. Vitányi:
  Approximating Rate-Distortion Graphs of Individual Data: Experiments in Lossy Compression and Denoising. 395-407
  
• Paola Flocchini, Toni Mesa Enriquez, Linda Pagli, Giuseppe Prencipe, Nicola Santoro:
  Distributed Minimum Spanning Tree Maintenance for Transient Node Failures. 408-414
  
• Zhen Wang, Shuqin Fan:
  Efficient Montgomery-Based Semi-Systolic Multiplier for Even-Type GNB of GF(2^m). 415-419
  
• Liangze Yin, Fei He, William N. N. Hung, Xiaoyu Song, Ming Gu:
  Maxterm Covering for Satisfiability. 420-426
  
• Sedat Akleylek, Ferruh Özbudak:
  Modified Redundant Representation for Designing Arithmetic Circuits with Small Complexity. 427-432
  

Volume 61, Number 4, April 2012

• Haiying Shen, Cheng-Zhong Xu:
  Leveraging a Compound Graph-Based DHT for Multi-Attribute Range Queries with Performance Analysis. 433-447
  
• Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam:
  New Design for Testability Approach for Clock Fault Testing. 448-457
  
• Haiying Shen, Kai Hwang:
  Locality-Preserving Clustering and Discovery of Resources in Wide-Area Distributed Computational Grids. 458-473
  
• Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose:
  An Energy-Efficient Memristive Threshold Logic Circuit. 474-487
  
• Naga Durga Prasad Avirneni, Arun K. Somani:
  Low Overhead Soft Error Mitigation Techniques for High-Performance and Aggressive Designs. 488-501
  
• Weiwu Hu, Yunji Chen, Tianshi Chen, Cheng Qian, Lei Li:
  Linear Time Memory Consistency Verification. 502-516
  
• Pengju Shang, Saba Sehrish, Jun Wang:
  TRAID: Exploiting Temporal Redundancy and Spatial Redundancy to Boost Transaction Processing Systems Performance. 517-529
  
• Brad D. Bingham, Mark R. Greenstreet:
  Modeling Energy-Time Trade-Offs in VLSI Computation. 530-547
  
• Paruj Ratanaworabhan, Martin Burtscher, Darko Kirovski, Benjamin G. Zorn, Rahul Nagpal, Karthik Pattabiraman:
  Efficient Runtime Detection and Toleration of Asymmetric Races. 548-562
  
• William Lloyd Bircher, Lizy K. John:
  Complete System Power Estimation Using Processor Performance Events. 563-577
  
• Irith Pomeranz:
  On the Computation of Common Test Data for Broadside and Skewed-Load Tests. 578-583
  
• Sedat Akleylek, Murat Cenk, Ferruh Özbudak:
  On the Polynomial Multiplication in Chebyshev Form. 584-587
  
• Alexander Thomasian:
  Comment on "DACO: A High Performance Disk Architecture". 588-590
  
• Mun-Kyu Lee:
  Comments on "Provably Sublinear Point Multiplication on Koblitz Curves and Its Hardware Implementation". 591-592
  

Volume 61, Number 5, May 2012

• Alberto Ros, Blas Cuesta Saez, Ricardo Fernández Pascual, María Engracia Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato:
  Extending Magny-Cours Cache Coherence. 593-606
  
• Dongdong Chen, Liu Han, Younhee Choi, Seok-Bum Ko:
  Improved Decimal Floating-Point Logarithmic Converter Based on Selection by Rounding. 607-621
  
• Jun-hee Yoo, Sungjoo Yoo, Kiyoung Choi:
  Active Memory Processor for Network-on-Chip-Based Architecture. 622-635
  
• Jae-Hong Kim, Sangwon Seo, Dawoon Jung, Jin-Soo Kim, Jaehyuk Huh:
  Parameter-Aware I/O Management for Solid State Disks (SSDs). 636-649
  
• Carlos Álvarez, Jesús Corbal, Mateo Valero:
  Dynamic Tolerance Region Computing for Multimedia. 650-665
  
• Kai-Chao Yang, Jia-Shung Wang:
  Unequal Error Protection for Streaming Media Based on Rateless Codes. 666-675
  
• Junfeng Fan, Frederik Vercauteren, Ingrid Verbauwhede:
  Efficient Hardware Implementation of Fp-Arithmetic for Pairing-Friendly Curves. 676-685
  
• Thomas Moyer, Kevin R. B. Butler, Joshua Schiffman, Patrick McDaniel, Trent Jaeger:
  Scalable Web Content Attestation. 686-699
  
• Srinivasagopalan Srivathsan, Costas Busch, S. S. Iyengar:
  An Oblivious Spanning Tree for Single-Sink Buy-at-Bulk in Low Doubling-Dimension Graphs. 700-712
  
• Cheng Wang, Changjun Jiang, Xiang-Yang Li, ShaoJie Tang, Yuan He, XuFei Mao, Yunhao Liu:
  Scaling Laws of Multicast Capacity for Power-Constrained Wireless Networks under Gaussian Channel Model. 713-725
  
• Sun-Yuan Hsieh, Ying-Chi Yang:
  A Classified Multisuffix Trie for IP Lookup and Update. 726-731
  
• Jithra Adikari, Vassil S. Dimitrov, Kimmo U. Järvinen:
  A Fast Hardware Architecture for Integer to \tauNAF Conversion for Koblitz Curves. 732-737
  
• Ying Xiao, Krishnaiyan Thulasiraman, Xi Fang, Dejun Yang, Guoliang Xue:
  Computing a Most Probable Delay Constrained Path: NP-Hardness and Approximation Schemes. 738-744
  
• Libo Huang, Sheng Ma, Li Shen, Zhiying Wang, Nong Xiao:
  Low-Cost Binary128 Floating-Point FMA Unit Design with SIMD Support. 745-751
  

Volume 61, Number 6, June 2012

• Jing Yang, Qiang Cao, Xu Li, Changsheng Xie, Qing Yang:
  ST-CDP: Snapshots in TRAP for Continuous Data Protection. 753-766
  
• Xuejun Yang, Zhiyuan Wang, Jingling Xue, Yun Zhou:
  The Reliability Wall for Exascale Supercomputing. 767-779
  
• Pascal Giorgi:
  On Polynomial Multiplication in Chebyshev Basis. 780-789
  
• Julio Villalba, Tomás Lang, Javier Hormigo:
  Radix-2 Multioperand and Multiformat Streaming Online Addition. 790-803
  
• Lin Shi, Hao Chen, Jianhua Sun, Kenli Li:
  vCUDA: GPU-Accelerated High-Performance Computing in Virtual Machines. 804-816
  
• Yu Hua, Bin Xiao, Bharadwaj Veeravalli, Dan Feng:
  Locality-Sensitive Bloom Filter for Approximate Membership Query. 817-830
  
• Christos Kyrkou, Theocharis Theocharides:
  A Parallel Hardware Architecture for Real-Time Object Detection with Support Vector Machines. 831-842
  
• Shang-Wei Lin, Pao-Ann Hsiung:
  Model Checking Prioritized Timed Systems. 843-856
  
• Turbo Majumder, Souradip Sarkar, Partha Pratim Pande, Ananth Kalyanaraman:
  NoC-Based Hardware Accelerator for Breakpoint Phylogeny. 857-869
  
• Catello Di Martino, Marcello Cinque, Domenico Cotroneo:
  Automated Generation of Performance and Dependability Models for the Assessment of Wireless Sensor Networks. 870-884
  
• Chia-Hung Lin, Jian-Jhih Kuo, Bing-Hong Liu, Ming-Jer Tsai:
  GPS-Free, Boundary-Recognition-Free, and Reliable Double-Ruling-Based Information Brokerage Scheme in Wireless Sensor Networks. 885-898
  
• Irith Pomeranz:
  Concatenation of Functional Test Subsequences for Improved Fault Coverage and Reduced Test Length. 899-904
  
• Irith Pomeranz:
  Fast Identification of Undetectable Transition Faults under Functional Broadside Tests. 905-910
  
• Y.-Chuang Chen, Shun-Fu Liu:
  A Note on Diagnosability of Large Fault Sets on Star Graphs. 911-912
  

Volume 61, Number 7, July 2012

• Xi E. Chen, Tor M. Aamodt:
  Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors. 913-927
  
• Wei-Lin Tsai, Wei-Chih Liu, James Chien-Mo Li:
  Structural Reduction Techniques for Logic-Chain Bridging Fault Diagnosis. 928-938
  
• Francesco Paterna, Andrea Acquaviva, Alberto Caprara, Francesco Papariello, Giuseppe Desoli, Luca Benini:
  Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications. 939-953
  
• Hong Shen, Longkun Guo:
  Efficient 2-Approximation Algorithms for Computing 2-Connected Steiner Minimal Networks. 954-968
  
• Xiaomei Liu, Li Xiao, Andrew Kreling:
  A Fully Distributed Method to Detect and Reduce Cut Vertices in Large-Scale Overlay Networks. 969-985
  
• Kunal P. Ganeshpure, Alodeep Sanyal, Sandip Kundu:
  A Pattern Generation Technique for Maximizing Switching Supply Currents Considering Gate Delays. 986-998
  
• Karl Pauwels, Matteo Tomasi, Javier Diaz Alonso, Eduardo Ros, Marc M. Van Hulle:
  A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features. 999-1012
  
• Yi-Hua E. Yang, Viktor K. Prasanna:
  High-Performance and Compact Architecture for Regular Expression Matching on FPGA. 1013-1025
  
• Hoang Le, Viktor K. Prasanna:
  Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning. 1026-1039
  
• Kun Ma, Han Liang, Kaijie Wu:
  Homomorphic Property-Based Concurrent Error Detection of RSA: A Countermeasure to Fault Attack. 1040-1049
  
• Jianguo Liu, Chao Pan, Zhenbing Liu:
  Novel Convolutions Using First-Order Moments. 1050-1056
  

Volume 61, Number 8, August 2012

• Elisardo Antelo, David Hough, Paolo Ienne:
  Guest Editors' Introduction: Special Section on Computer Arithmetic. 1057-1058
  
• Wei Liu, Alberto Nannarelli:
  Power Efficient Division and Square Root Unit. 1059-1070
  
• Filippo Gandino, Fabrizio Lamberti, Gianluca Paravati, Jean-Claude Bajard, Paolo Montuschi:
  An Algorithmic and Architectural Study on Montgomery Exponentiation in RNS. 1071-1083
  
• Abhilasha Aswal, Ganesh Perumal, G. N. Srinivasa Prasanna:
  On Basic Financial Decimal Operations on Binary Machines. 1084-1096
  
• Petr Kurka:
  Fast Arithmetical Algorithms in Möbius Number Systems. 1097-1109
  
• Andrew S. Cassidy, Andreas G. Andreou:
  Beyond Amdahl's Law: An Objective Function That Links Multiprocessor Performance Gains to Delay and Energy. 1110-1126
  
• Chen-Wei Huang, Shiao-Li Tsao:
  Minimizing Energy Consumption of Embedded Systems via Optimal Code Layout. 1127-1139
  
• Sanjoy K. Baruah, Vincenzo Bonifaci, Gianlorenzo D'Angelo, Haohan Li, Alberto Marchetti-Spaccamela, Nicole Megow, Leen Stougie:
  Scheduling Real-Time Mixed-Criticality Jobs. 1140-1152
  
• Andrey Bogdanov, Ilya Kizhvatov:
  Beyond the Limits of DPA: Combined Side-Channel Collision Attacks. 1153-1164
  
• Mehran Mozaffari Kermani, Arash Reyhani-Masoleh:
  Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM. 1165-1178
  
• Irith Pomeranz:
  On the Switching Activity and Static Test Compaction of Multicycle Scan-Based Tests. 1179-1188
  
• Ashur Rafiev, Andrey Mokhov, Frank P. Burns, Julian P. Murphy, Albert Koelmans, Alex Yakovlev:
  Mixed Radix Reed-Muller Expansions. 1189-1202
  
• Anahit Martirosyan, Azzedine Boukerche:
  Preserving Temporal Relationships of Events for Wireless Sensor Actor Networks. 1203-1216
  

Volume 61, Number 9, September 2012

• Yongzhi Cao:
  Reliability of Mobile Processes with Noisy Channels. 1217-1230
  
• Alejandro Valero, Salvador Petit, Julio Sahuquillo, Pedro López, José Duato:
  Design, Performance, and Energy Consumption of eDRAM/SRAM Macrocells for L1 Data Caches. 1231-1242
  
• Dong Wang, Milos D. Ercegovac:
  A Radix-16 Combined Complex Division/Square Root Unit with Operand Prescaling. 1243-1255
  
• Jae-Beom Lee, Myoung-Jin Kim, Sungroh Yoon, Eui-Young Chung:
  Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications. 1256-1269
  
• Costas Busch, Rajgopal Kannan, Athanasios V. Vasilakos:
  Approximating Congestion + Dilation in Networks via "Quality of Routing" Games. 1270-1283
  
• Tania Banerjee-Mishra, Sartaj Sahni:
  Consistent Updates for Packet Classifiers. 1284-1295
  
• Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato:
  Progressive Congestion Management Based on Packet Marking and Validation Techniques. 1296-1310
  
• Bach Duy Bui, Rodolfo Pellizzoni, Marco Caccamo:
  Real-Time Scheduling of Concurrent Transactions in Multidomain Ring Buses. 1311-1324
  
• Hongya Wang, Yingyuan Xiao, LihChyun Shu:
  Scheduling Periodic Continuous Queries in Real-Time Data Broadcast Environments. 1325-1340
  
• Oleg Golubitsky, Dmitri Maslov:
  A Study of Optimal 4-Bit Reversible Toffoli Circuits and Their Synthesis. 1341-1353
  
• Miaoqing Huang, Vikram K. Narayana, Mohamed Bakhouya, Jaafar Gaber, Tarek A. El-Ghazawi:
  Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants. 1354-1360
  

Volume 61, Number 10, October 2012

• Michail Maniatakos, Chandrasekharan Tirumurti, Rajesh Galivanche, Yiorgos Makris:
  Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors. 1361-1370
  
• Xiaorui Wang, Kai Ma, Yefu Wang:
  Cache Latency Control for Application Fairness or Differentiation in Power-Constrained Chip Multiprocessors. 1371-1385
  
• Hao Wang, Haiquan (Chuck) Zhao, Bill Lin, Jun (Jim) Xu:
  Robust Pipelined Memory System with Worst Case Performance Guarantee for Network Processing. 1386-1400
  
• Jian Yang, Ke Zeng, Han Hu, Hongsheng Xi:
  Dynamic Cluster Reconfiguration for Energy Conservation in Computation Intensive Service. 1401-1416
  
• Dezun Dong, Xiangke Liao, Kebin Liu, Yunhao Liu, Weixia Xu:
  Distributed Coverage in Wireless Ad Hoc and Sensor Networks by Topological Graph Approaches. 1417-1428
  
• Xi Deng, Yuanyuan Yang:
  Online Adaptive Compression in Delay Sensitive Wireless Sensor Networks. 1429-1442
  
• Hady S. AbdelSalam, Stephan Olariu:
  Toward Adaptive Sleep Schedules for Balancing Energy Consumption in Wireless Sensor Networks. 1443-1458
  
• Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson:
  Access Time Analysis for IEEE P1687. 1459-1472
  
• Joon-Sung Yang, Nur A. Touba, Benoit Nadeau-Dostie:
  Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops. 1473-1483
  
• Vinay Hanumaiah, Sarma B. K. Vrudhula:
  Temperature-Aware DVFS for Hard Real-Time Applications on Multicore Processors. 1484-1494
  
• Ziyi Zhang, Xin Wang, Qin Xin:
  A New Performance Metric for Construction of Robust and Efficient Wireless Backbone Network. 1495-1506
  
• Francesco Malandrino, Claudio Casetti, Carla-Fabiana Chiasserini:
  Content Discovery and Caching in Mobile Networks with Infrastructure. 1507-1520
  

Volume 61, Number 11, November 2012

• Alessandro Savino, Stefano Di Carlo, Gianfranco Politano, Alfredo Benso, Alberto Bosio, Giorgio Di Natale:
  Statistical Reliability Estimation of Microprocessor-Based Systems. 1521-1534
  
• Yoav Etsion, Dror G. Feitelson:
  Exploiting Core Working Sets to Filter the L1 Cache with Random Sampling. 1535-1550
  
• Álvaro Vázquez, Julio Villalba-Moreno, Elisardo Antelo, Emilio L. Zapata:
  Redundant Floating-Point Decimal CORDIC Algorithm. 1551-1562
  
• Ho Fai Ko, Nicola Nicolici:
  Mapping Trigger Conditions onto Trigger Units during Post-silicon Validation and Debugging. 1563-1575
  
• Jin-Fu Li:
  Testing and Diagnosing Comparison Faults of TCAMs with Asymmetric Cells. 1576-1587
  
• Mustafa Altun, Marc D. Riedel:
  Logic Synthesis for Switching Lattices. 1588-1600
  
• Savio S. H. Tse:
  Online Bounds on Balancing Two Independent Criteria with Replication and Reallocation. 1601-1610
  
• Shaoshan Liu, Jie Tang, Ligang Wang, Xiao-Feng Li, Jean-Luc Gaudiot:
  Packer: Parallel Garbage Collection Based on Virtual Spaces. 1611-1623
  
• Jeongseob Ahn, Daehoon Kim, Jae-Hong Kim, Jaehyuk Huh:
  Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction. 1624-1637
  
• Pi-Cheng Hsiu, Cheng-Kang Hsieh, Der-Nien Lee, Tei-Wei Kuo:
  Multilayer Bus Optimization for Real-Time Embedded Systems. 1638-1650
  
• H. Howie Huang, Nan Zhang, Wei Wang, Gautam Das, Alexander S. Szalay:
  Just-in-Time Analytics on Large File Systems. 1651-1664
  

Volume 61, Number 12, December 2012

• Albert Y. Zomaya:
  A Message to the Editorial Board. 1665
  
• Mootaz Elnozahy, Rami G. Melhem:
  Guest Editors' Introduction: Special Section on Energy Efficient Computing. 1666-1667
  
• Keqin Li:
  Scheduling Precedence Constrained Tasks with Reduced Processor Energy on Multiprocessor Computers. 1668-1681
  
• Jian-Jun Han, Xiaodong Wu, Dakai Zhu, Hai Jin, Laurence Tianruo Yang, Jean-Luc Gaudiot:
  Synchronization-Aware Energy Management for VFI-Based Multicore Real-Time Systems. 1682-1696
  
• Kshitij Sudan, Karthick Rajamani, Wei Huang, John B. Carter:
  Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall. 1697-1710
  
• Ankit Sethia, Ganesh S. Dasika, Trevor N. Mudge, Scott A. Mahlke:
  A Customized Processor for Energy Efficient Scientific Computing. 1711-1723
  
• Ardavan Pedram, Robert A. van de Geijn, Andreas Gerstlauer:
  Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures. 1724-1736
  
• Michael Cardosa, Aameek Singh, Himabindu Pucha, Abhishek Chandra:
  Exploiting Spatio-Temporal Tradeoffs for Energy-Aware MapReduce in the Cloud. 1737-1751
  
• Osman Sarood, Phil Miller, Ehsan Totoni, Laxmikant V. Kalé:
  "Cool" Load Balancing for High Performance Computing Data Centers. 1752-1764
  
• Yu Xiao, Wei Li, Matti Siekkinen, Petri Savolainen, Antti Ylä-Jääski, Pan Hui:
  Power Management for Wireless Data Transmission Using Complex Event Processing. 1765-1777
  
• Isidoros Sideris, Kiamal Z. Pekmestzi:
  Cost Effective Protection Techniques for TCAM Memory Arrays. 1778-1788
  
• Lykomidis Mastroleon, Daniel C. O'Neill, Benjamin Yolken, Nicholas Bambos:
  Power and Delay Aware Management of Packet Switches. 1789-1799
  
• Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides:
  Optimizing Hardware Design by Composing Utility-Directed Transformations. 1800-1812
  
• Yue-Li Wang, Cheng-Ju Hsu, Jia Jie Liu, Ming-Tat Ko, Fu-Hsing Wang:
  A New Subclass of Integer Linear Programming Problems and Its Applications. 1813-1822
  

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