Volume 10, Number 1, January 1991
Giovanni De Micheli
: Synchronous logic synthesis: algorithms for cycle-time minimization.
Randal E. Bryant
: Formal verification of memory circuits by switch-level simulation.
Niraj K. Jha
: Totally self-checking checker designs for Bose-Lin, Bose, and Blaum codes.
Volume 10, Number 2, February 1991
Peter M. Maurer
: Scheduling blocks of hierarchical compiled simulation of combinational circuits.
: An adaptation of the interior point method for solving the global routing problem.
Volume 10, Number 3, March 1991
: Switch-level simulation using dynamic graph algorithms.
Charles H. Stapper
: Statistics associated with spatial fault simulation used for evaluating integrated circuit yield enhancement.
Volume 10, Number 4, April 1991
C. Bernard Shung
, Rajeev Jain
, Ken Rimey
, Edward Wang
, Mani B. Srivastava
, Brian C. Richards
, Erik Lettang
, Syed Khalid Azim
, Lars E. Thon
, Paul N. Hilfinger
, Jan M. Rabaey
, Robert W. Brodersen
: An integrated CAD system for algorithm-specific IC design.
: A tool for hierarchical test generation.
Volume 10, Number 5, May 1991
Volume 10, Number 6, June 1991
David M. Lewis
: A hierarchical compiled code event-driven logic simulator.
Volume 10, Number 7, July 1991
Larry G. Jones
: Fast batch incremental netlist compilation hierarchical schematics.
Volume 10, Number 8, August 1991
, C. L. Liu
: On the k-layer planar subset and topological via minimization problems.
C. Leonard Berman
: Circuit width, register allocation, and ordered binary decision diagrams.
: Near optimal factorization of Boolean functions.
Pak K. Chan
: Comments on `Asymptotic waveform evaluation for timing analysis'.
Volume 10, Number 9, September 1991
: Segment-based etch algorithm and modeling.
Mark E. Law
: Parameters for point-defect diffusion and recombination.
Mark R. Simpson
: PRIDE: an integrated design environment for semiconductor device simulation.
Volume 10, Number 10, October 1991
Volume 10, Number 11, November 1991
: Pin assignment with global routing for general cell designs.
: The use of small pivot perturbation in circuit analysis.
Volume 10, Number 12, December 1991
: Optimizing interacting finite state machines using sequential don't cares.
: A state assignment procedure for single-block implementation of state charts.
, Guoxiang Cao
: A generalized Scharfetter-Gummel method to eliminate crosswind effects [semiconduction device modeling].