Volume 8, Number 1, January 1989
S. S.-S. Chung
: A charge-based capacitance model of short-channel MOSFETs.
Pramod V. Argade
: Sizing an inverter with a precise delay: generation of complementary signals with minimal skew and pulsewidth distortion in CMOS.
Volume 8, Number 2, February 1989
Eddie van Schie
, Jan Middelhoek
: Two methods to improve the performance of Monte Carlo simulations of ion implantation in amorphous targets.
Volume 8, Number 3, March 1989
: Modeling of gate oxide shorts in MOS transistors.
: Self-exercising checkers for unified built-in self-test (UBIST).
, Wim De Pauw
: Quad list quad trees: a geometrical data structure with improved performance for large region queries.
: How to build a hardware description and measurement system on an object-oriented programming language.
: A knowledge-based system for the evaluation and redesign of digital circuit networks.
Volume 8, Number 4, April 1989
Walter R. Curtice
: Intrinsic GaAs MESFET equivalent circuit models generated from two-dimensional simulations.
Volume 8, Number 5, May 1989
Niraj K. Jha
: Separable codes for detecting unidirectional errors.
J. T. Mowchenko
: A lower bound on channel density after global routing.
Volume 8, Number 6, June 1989
: Analytical approaches to the combinatorial optimization in linear placement problems.
Volume 8, Number 7, July 1989
: Universality of mobility-gate field characteristics of electrons in the inversion charge layer and its application in MOSFET modeling.
Niraj K. Jha
: A totally self-checking checker for Borden's code.
: On empty rooms in floorplan graphics: comments on a deficiency in two papers.
H. L. Kwok
: Threshold voltage for GaAs MESFET with a recoil-implanted channel profile.
Volume 8, Number 8, August 1989
Rex E. Lowther
: A discretization scheme that allows coarse grid-spacing in finite-difference process simulation.
Volume 8, Number 9, September 1989
: Enhancing random-pattern coverage of programmable logic arrays via masking technique.
Çetin Kaya Koç
, P. F. Ordung
: Schwarz-Christoffel transformation for the simulation of two-dimensional capacitance [VLSI circuits].
Volume 8, Number 10, October 1989
Mehmet A. Cirit
: The Meyer model revisited: why is charge not conserved? [MOS transistor].
, B. J. Sheu
: Temperature dependence modeling for MOS VLSI circuit simulation.
Volume 8, Number 11, November 1989
: Design of multioutput CMOS combinational logic circuits for robust testability.
Volume 8, Number 12, December 1989
: Reasoning about the function and timing of integrated circuits with interval temporal logic.
Charles H. Stapper
: Simulation of spatial fault distributions for integrated circuit yield estimations.