ACM Transactions on Reconfigurable Technology and Systems, Volume 1

Volume 1, Number 1, March 2008

Special edition on the 15th international symposium on FPGAs

Duncan A. Buell, Wayne Luk:
Introduction.
André DeHon, Mike Hutton:
Guest Editorial: TRETS Special Edition on the 15th International Symposium on FPGAs.
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa:
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations.
Satish Sivaswamy, Kia Bazargan:
Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs.
Shih-Lien Lu, Peter Yiannacouras, Taeweon Suh, Rolf Kassa, Michael Konow:
A Desktop Computer with a Reconfigurable Pentium®.
Wenyi Feng, Sinan Kaptanoglu:
Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy.
Steven J. E. Wilton, Chun Hok Ho, Bradley R. Quinton, Philip Heng Wai Leong, Wayne Luk:
A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications.

Tim Güneysu, Christof Paar, Jan Pelzl:
Special-Purpose Hardware for Solving the Elliptic Curve Discrete Logarithm Problem.
Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, Brandon Harris, Roger D. Chamberlain:
Mercury BLASTP: Accelerating Protein Sequence Alignment.
N. Pete Sedcole, Peter Y. K. Cheung:
Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations.
Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski:
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs.
David B. Thomas, Wayne Luk:
Multivariate Gaussian Random Number Generation Targeting Reconfigurable Hardware.

Julien Lamoureux, Steven J. E. Wilton:
On the trade-off between power and flexibility of FPGA clock networks.
David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning:
An open-source HyperTransport core.
John Sachs Beeckler, Warren J. Gross:
Particle graphics on reconfigurable hardware.
David Grant, Guy G. Lemieux:
Perturb+mutate: Semisynthetic circuit generation for incremental placement and routing.
Pao-Ann Hsiung, Chao-Sheng Lin, Chih-Feng Liao:
Perfecto: A systemc-based design-space exploration framework for dynamically reconfigurable architectures.

Scott Y. L. Chin, Steven J. E. Wilton:
Static and Dynamic Memory Footprint Reduction for FPGA Routing Algorithms.
Ning-Yi Xu, Xiongfei Cai, Rui Gao, Lei Zhang, Feng-Hsiung Hsu:
FPGA Acceleration of RankBoost in Web Search Engines.
Cameron D. Patterson, Steven W. Ellingson, Brian S. Martin, K. Deshpande, John H. Simonetti, M. Kavic, Sean E. Cutchin:
Searching for Transient Pulses with the ETA Radio Telescope.
Esam El-Araby, Ivan Gonzalez, Tarek A. El-Ghazawi:
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing.
Brian Holland, Karthik Nagarajan, Alan D. George:
RAT: RC Amenability Test for Rapid Performance Prediction.
S. Murtaza, Alfons G. Hoekstra, Peter M. A. Sloot:
Compute Bound and I/O Bound Cellular Automata Simulations on FPGA Logic.
Christos-Savvas Bouganis, Sung-Boem Park, George A. Constantinides, Peter Y. K. Cheung:
Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs.

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