Volume 2007, 2007
- Jianhong Xiao, Guang Zhang, Tianwei Li, José Silva-Martínez:
Low-Power Fully Integrated CMOS DTV Tuner Front-End for ATSC Terrestrial Broadcasting.
- Xin Wang, Jari Nurmi:
Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network.
- Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli:
A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees.
- Thomas Noulis, Constantinos Deradonis, Stylianos Siskos:
Advanced Readout System IC Current Mode Semi-Gaussian Shapers Using CCIIs and OTAs.
- Paul Bogdan, Tudor Dumitras, Radu Marculescu:
Stochastic Communication: A New Paradigm for Fault-Tolerant Networks-on-Chip.
- Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Network Delays and Link Capacities in Application-Specific Wormhole NoCs.
- Andreas Hansson, Kees Goossens, Andrei Radulescu:
Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip.
- Ethiopia Nigussie, Teijo Lehtonen, Sampo Tuuna, Juha Plosila, Jouni Isoaho:
High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling.
- Paolo Meloni, Igor Loi, Federico Angiolini, Salvatore Carta, Massimo Barbaro, Luigi Raffo, Luca Benini:
Area and Power Modeling for Networks-on-Chip with Layout Awareness.
- Teijo Lehtonen, Pasi Liljeberg, Juha Plosila:
Online Reconfigurable Self-Timed Links for Fault Tolerant NoC.
- Andreas Hansson, Kees Goossens, Andrei Radulescu:
A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic.
- Davide Bertozzi, Shashi Kumar, Maurizio Palesi:
Networks-on-Chip: Emerging Research Topics and Novel Ideas.
- Anh Dinh, Jiandong Ge:
A Q-Enhanced 3.6 GHz, Tunable, Sixth-Order Bandpass Filter Using 0.18 μm CMOS.
- Jingye Xu, Abinash Roy, Masud H. Chowdhury:
Power Consumption and BER of Flip-Flop Inserted Global Interconnect.
- Przemyslaw Sypka, Mariusz Ziólko:
Robustness of Transmultiplexed Images.
- Rafal Tomasz Dlugosz, Krzysztof Iniewski:
Flexible Architecture of Ultra-Low-Power Current-Mode Interleaved Successive Approximation Analog-to-Digital Converter for Wireless Sensor Networks.
- Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek K. De:
Variation-Tolerant and Low-Power Source-Synchronous Multicycle On-Chip Interconnect Scheme.
- Pierre Guironnet de Massas, Paul Amblard, Frédéric Pétrot:
On SPARC LEON-2 ISA Extensions Experiments for MPEG Encoding Acceleration.
- Dimitar P. Dimitrov, Tania Krumova Vasileva:
Eight-Bit Semiflash A/D Converter.
- Shyue-Kung Lu, Yuang-Cheng Hsiao, Chia-Hsiu Liu, Chun-Lin Yang:
Low-Power Built-In Self-Test Techniques for Embedded SRAMs.
- Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun:
A Video Specific Instruction Set Architecture for ASIP design.
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