Volume 13, Number 1, August 1996
- Paolo Ienne, Thierry Cornu, Gary Kuhn:
Special-purpose digital hardware for neural networks: An architectural survey.
5-25
- Konstantinos I. Diamantaras, W. H. Chou, Sun-Yuan Kung:
Dynamic programming implementation on array processor architectures.
27-35
- Michael Sheliga, Edwin Hsing-Mean Sha:
Hardware/Software co-design with the HMS framework.
37-56
- Ding-Ming Kwai, Behrooz Parhami:
FFT computation with linear processor arrays using a data-driven control scheme.
57-66
- Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh.
67-75
Volume 13, Numbers 2-3, August 1996
- Anantha P. Chandrakasan, Robert W. Brodersen:
Guest editors' introduction.
85-86
- Prathima Agrawal, Eoin Hyden, Paul Krzyzanowski, Mani B. Srivastava, John A. Trotter:
Hardware-software architecture of the SWAN Wireless ATM network.
87-104
- Charles Chien, Sean Nazareth, Paul Lettieri, Stephen Molloy, Brian Schoner, Walter A. Boring IV, Joey Chen, Christopher Deng, William H. Mangione-Smith, Rajeev Jain:
An integrated testbed for wireless multimedia computing.
105-124
- Benjamin M. Gordon, Ely K. Tsern, Teresa H. Y. Meng:
Design of a low power video decompression chip set for portable applications.
125-142
- M. Chian, G. Croft, S. Jost, P. Landy, B. Myers, J. Prentice, Doug Schultz:
IC implementation challenges of a 2.4 GHz wireless LAN chipset.
143-163
- Kalluri R. Sarma, Tayo Akinwande:
Flat panel displays for portable systems.
165-190
- Tadahiro Kuroda, Takayasu Sakurai:
Threshold-Volgage control schemes through substrate-bias for low-power high-speed CMOS LSI design.
191-201
- Thomas D. Burd, Robert W. Brodersen:
Processor design for portable systems.
203-221
- Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien-Chien Lee:
Instruction level power analysis and optimization of software.
223-238
- Renu Mehra, Lisa M. Guerra, Jan M. Rabaey:
Low-power architectural synthesis and the impact of exploiting locality.
239-258
- José Monteiro, Srinivas Devadas:
Techniques for power estimation and optimization at the logic level: A survey.
259-276
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