Volume 14, Number 1, October 1996
- Kung Yao, Flavio Lorenzelli:
Guest editors' introduction.
5-6

- Jürgen Götze, Peter Rieder:
SVD-updating using orthonormal mu-rotations.
7-17

- Franklin T. Luk, Sanzheng Qiao:
A symmetric rank-revealing toeplitz matrix decomposition.
19-28

- Hervé Lebret:
Optimal beamforming via interior point methods.
29-41

- Flavio Lorenzelli, A. Wang, D. Korompis, Ralph E. Hudson, Kung Yao:
Subband processing for broadband microphone arrays.
43-55

- Julia A. Olkin, Paul J. Titterton:
Using semi-definite programming for multi-constrainedH2 controller design in active noise and vibration control.
57-66

- Marc Moonen, Ed F. Deprettere:
A fully pipelined RLS-based array for channel equalization.
67-74

- Aleksandar Kavcic, Bin Yang:
Subspace tracking with adaptive threshold rank estimation.
75-91

- Ronald D. DeGroat, Eric M. Dowling, Darel A. Linebarger:
Bias correction and forward-backward averaging in frequency/DOA tracking problems.
93-105

- Sylvie Marcos, Messaoud Benidir, Javier Sanchez-Araujo:
An adaptive tracking algorithm for direction finding and array shape estimation in a nonstationary environment.
107-118

Volume 14, Number 2, November 1996
- John G. Ackenhusen, Yu Hen Hu:
Guest editors' introduction.
123-124

- Thomas Egolf, M. Pettigrew, James Debardelaben, R. Hezar, S. Famorzadeh, A. Kavipurapu, Moinul H. Khan, Lan-Rong Dung, K. Balemarthy, N. Desai, Vijay K. Madisetti:
VHDL-based rapid system prototyping.
125-156

- Asawaree Kalavade, Edward A. Lee:
Complexity management in system-level design.
157-169

- Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens:
Architectures for wavelet transforms: A survey.
171-192

- Joseph M. Winograd, S. Hamid Nawab:
Probabilistic complexity analysis for a class of approximate DFT algorithms.
193-205

- Graham A. Jullien, Wenzhe Luo, Neil M. Wigley:
High throughput VLSI DSP using replicated finite rings.
207-220

- James R. Armstrong, Geoff Frank, F. Gail Gray:
Efficient approaches to testing VHDL DSP models.
221-234

Volume 14, Number 3, December 1996
- Vojin G. Oklobdzija, Belle Wei:
Guest editors' introduction.
239-240

- Zhongde Wang, Graham A. Jullien, William C. Miller:
An efficient tree architecture for modulo 2n+1 multiplication.
241-248

- Sorin Cotofana, Stamatis Vassiliadis:
delta-Bit serial binary addition with linear threshold networks.
249-264

- Chris Dick, Fred Harris:
Narrow-band FIR filtering with FPGAs using sigma-delta modulation encoding.
265-282

- Milos D. Ercegovac, Tomás Lang:
On recoding in arithmetic algorithms.
283-294

- Hercule Kwan, Robert Leonard Nelson Jr., Earl E. Swartzlander Jr.:
A new design for a lookahead carry generator.
295-302

- Richard H. Strandberg, Luis G. Bustamante, Vojin G. Oklobdzija, Michael A. Soderstrand, Jean-Claude Duc:
Efficient realizations of squaring circuit and reciprocal used in adaptive sample rate notch filters.
303-309

- Sheng-Chieh Huang, Liang-Gee Chen, Thou-Ho Chen:
A 32-bit logarithmic number system processor.
311-319

- Paul F. Stelling, Vojin G. Oklobdzija:
Design strategies for optimal hybrid final adders in a parallel multiplier.
321-331

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