The Journal of Signal Processing Systems, Volume 56
Volume 56, Number 1, July 2009
Andreas Persson, Lars Bengtsson: Forward and Reverse Converters and Moduli Set Selection in Signed-Digit Residue Number Systems. 1-15
V. Torres, A. Perez-Pascual, T. Sansaloni, Javier Valls: Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications. 17-23
Roberto Gutierrez, Javier Valls: Low-Power FPGA-Implementation of atan(Y/X) Using Look-Up Table Methods for Communication Applications. 25-33
A. Perez-Pascual, T. Sansaloni, V. Torres, Vicenc Almenar-Terre, Javier Valls: Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems. 35-40
Vanderlei Bonato, Eduardo Marques, George A. Constantinides: A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots. 41-50
Mustafa Gök, Metin Mete Özbilen: Evaluation of Sticky-Bit Generation Methods for Floating-Point Multipliers. 51-57
Michael R. Smith, James Miller, Steven Daeninck: A Test-oriented Embedded System Production Methodology. 69-89
Alexey Lopich, Piotr Dudek: Hardware Implementation of Skeletonization Algorithm for Parallel Asynchronous Image Processing. 91-103
Volume 56, Numbers 2-3, September 2009
Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen: Evaluating SoC Network Performance in MPEG-4 Encoder. 105-123
Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest: Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. 125-139
Theodoros Giannopoulos, Vassilis Paliouras: A Low-Complexity PTS-based PAPR Reduction Technique for OFDM Signals without Transmission of Side Information. 141-153
Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois: High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse. 155-165
Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin: Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis. 167-186
Andrew K. C. Kwan, Mohamed Helaoui, Slim Boumaiza, Michael R. Smith, Fadhel M. Ghannouchi: Wireless Communications Transmitter Performance Enhancement Using Advanced Signal Processing Algorithms Running in a Hybrid DSP/FPGA Platform. 187-198
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser Alexander: Automated Design Space Exploration for DSP Applications. 199-216
Daesun Oh, Keshab K. Parhi: Low Complexity Decoder Architecture for Low-Density Parity-Check Codes. 217-228
Geoff Knagge, Mark Bickerstaff, Brett Ninness, Steven R. Weller, Graeme Woodward: A VLSI 8 × 8 MIMO Near-ML Detector with Preprocessing. 229-247
Hoseok Chang, Junho Cho, Wonyong Sung: Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit. 249-260
Haideh M. Karkhanechi, Bernard C. Levy: An Efficient Adaptive Channel Estimation Algorithm for MIMO OFDM Systems - Study of Doppler Spread Tolerance. 261-271
David Novo, Thomas Schuster, Bruno Bougard, Andy Lambrechts, Liesbet Van der Perre, Francky Catthoor: Energy-performance Exploration of a CGA-based SDR Processor. 273-284
Choong Jin Hyun, Myung Hoon Sunwoo: Low Power Complexity-Reduced ME and Interpolation Algorithms for H.264/AVC. 285-293
Rafal Dlugosz, Krzysztof Iniewski: Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology. 295-306
Jun Cai, Mohamed S. Shehata, Wael M. Badawy: A Robust Video-Based Algorithm for Detecting Snow Movement in Traffic Scenes. 307-326
Min Li, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor: Energy Aware Algorithm and Implementation of SDR Oriented HSDPA Chip Level Equalizer. 327-340
Tokunbo Ogunfunmi, Thomas K. Paul: Analysis of Convergence of a Frequency-Domain LMS Adaptive Filter Implemented as a Multi-Stage Adaptive Filter. 341-350



