The Journal of Signal Processing Systems, Volume 58
Volume 58, Number 1, January 2010

Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois: FPGA-Based Efficient Design Approaches for Large Size Two's Complement Squarers. 3-15
Milos D. Ercegovac, Jean-Michel Muller: An Efficient Method for Evaluating Complex Polynomials. 17-27
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Arnold: A Novel Cotransformation for LNS Subtraction. 29-40
Götz Kappen, Lothor Kurz, O. Priebe, Tobias G. Noll: Design Space Exploration for an ASIP/Co-Processor Architecture used in GNSS Receivers. 41-51
Jae Young Hur, Stephan Wong, Todor Stefanov: Design Trade-offs in Customized On-chip Crossbar Schedulers. 69-85
Volume 58, Number 2, February 2010
Min Li, Tanja Van Achteren, Erik Brockmeyer, Francky Catthoor: Statistical Performance Analysis and Estimation for Parallel Multimedia Processing. 105-116
Israel Mark Martínez-Pérez, Wolfgang Brandt, Michael Wild, Karl-Heinz Zimmermann: Bioinspired Parallel Algorithms for Maximum Clique Problem on FPGA Architectures. 117-124
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Kaushik Roy: Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. 125-137
Xiao Yan Zhang, Yiu-Hing Chan, Robert K. Montoye, Leon J. Sigal, Eric M. Schwarz, Michael Kelly: A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit. 139-144
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Total Power Optimization for Combinational Logic Using Genetic Algorithms. 145-160
Shih-Chang Hsia, Chin-Feng Tsai, Szu-Hong Wang, King-Chu Hung: Transposed-Memory Free Implementation for Cost-Effective 2D-DCT Processor. 161-172
Shing-Chow Chan, Yi Zhou, Ka-Leung Ho: A New Sequential Block Partial Update Normalized Least Mean M-Estimate Algorithm and its Convergence Performance Analysis. 173-191
Choonseung Lee, Sungchan Kim, Soonhoi Ha: A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification. 193-213
Guillermo Payá Vayá, Javier Martín-Langerwerf, Peter Pirsch: A Multi-Shared Register File Structure for VLIW Processors. 215-231
Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin: Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2m) Using Double Parity Prediction Scheme. 233-246
Lei Zhang, Meikang Qiu, Wei-Che Tseng, Edwin Hsing-Mean Sha: Variable Partitioning and Scheduling for MPSoC with Virtually Shared Scratch Pad Memory. 247-265
Volume 58, Number 3, March 2010
Salih Tuna, Mahesan Niranjan: Inference from Low Precision Transcriptome Data Representation. 267-279
Konstantinos Babionitakis, Vassilios A. Chouliaras, Konstantinos Manolopoulos, Kostantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos: Fully Systolic FFT Architecture for Giga-sample Applications. 281-299
Dimitris G. Bariamis, Dimitris Maroulis, Dimitrios K. Iakovidis: Adaptable, Fast, Area-Efficient Architecture for Logarithm Approximation with Arbitrary Accuracy on FPGA. 301-310
Haixin Wang, Guoqiang Bai, Hongyi Chen: A Gbps IPSec SSL Security Processor Design and Implementation in an FPGA Prototyping Platform. 311-324
Qing Wu, King To Ng, Shing-Chow Chan, Heung-Yeung Shum: Convex Optimization-Based Bit Allocation for Video Coding. 325-340
Zhiqiang Zhang, Zhipei Huang, Jiankang Wu: Ambulatory Hip Angle Estimation using Gaussian Particle Filter. 341-357
Neil Joshi, Ling Guan: Feature Fusion Applied to Missing Data ASR with the Combination of Recognizers. 359-370
B. Prabhakaran: Guest Editorial: Special Section on Multimedia Semantics. 371-372
Alexander G. Hauptmann, Ming-yu Chen, Michael G. Christel, Wei-Hao Lin, J. Yang: A Multi-Pronged Approach to Improving Semantic Extraction of News Video. 373-385
Jong Wook Kim, K. Selçuk Candan, Jun'ichi Tatemura: Organization and Tagging of Blog and News Entries Based on Content Reuse. 407-421



