Prolog & VLSI

• W. F. Clocksin: Logic Programming and Digital Circuit Analysis. J. Log. Program. 4(1): 59-82(1987)
• Kave Eshghi: Application of Meta-language Programming to Fault Finding in Logic Circuits. ICLP 1982: 240-246
• Thomas Filkorn, Richard Schmid, Erik Tidén, Peter Warkentin: Experiences from a Large Industrial Circuit Design Application. ISLP 1991: 581-595
• Eric Gullichsen: Heuristic Circuit Simulation Using Prolog. Integration, the VLSI Journal 3: 283-318 (1985)
• Peter B. Reintjes: A VLSI Design Environment in PROLOG. ICLP/SLP 1988: 70-81
• Peter B. Reintjes: Elegant Technologies. PAP 1992, HTML-Version
• Peter B. Reintjes: Prolog for Software Engineering. PAP 1994, HTML-Version
• Peter B. Reintjes: AUNT: A Universal Netlist Translator. SLP 1987: 508-515
• Peter B. Reintjes: AUNT: A Universal Netlist Translator. J. Log. Program. 8(1): 5-19(1990)
• Peter B. Reintjes: A Set of Tools for VHDL Design. ICLP 1991: 549-562
• Renate Beckmann, Ulrich Bieker, Ingolf Markhof: Application of Constraint Logic Programming for VLSI CAD Tools. CCL 1994: 183-200