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Tom Vander Aa
2010 – today
- 2012
[j7]Martin Palkovic, Peter Debacker, Prabhat Avasare, Steven Dupont, Tom Vander Aa: Power Estimation at Different Abstraction Levels for Wireless Baseband Processors. J. Low Power Electronics 8(5): 726-738 (2012)- [c20]Tom Vander Aa, Panagiotis Theocharis: Hands-on tutorial: coarse-grained reconfigurable architectures - compilation and exploration. CODES+ISSS 2012: 575-576
- 2011
- [j6]Tomoya Suzuki, Hideki Yamada, Toshiyuki Yamagishi, Daisuke Takeda, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa: High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors. IEEE Micro 31(6): 19-28 (2011)
- [c19]Tom Vander Aa, Martin Palkovic, Matthias Hartmann, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre: A multi-threaded coarse-grained array processor for wireless baseband. SASP 2011: 102-107
- [c18]Prashant Agrawal, Robert Fasthuber, Praveen Raghavan, Tom Vander Aa, Ubaid Ahmad, Liesbet Van der Perre, Francky Catthoor: High level analysis of trade-offs across different partitioning schemes for wireless applications. SiPS 2011: 156-162
- 2010
- [j5]Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger: Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. Signal Processing Systems 60(2): 225-237 (2010)
- [j4]Bjorn De Sutter, Osman Allam, Praveen Raghavan, Roeland Vandebriel, Hans Cappelle, Tom Vander Aa, Bingfeng Mei: An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors. Signal Processing Systems 61(2): 157-179 (2010)
- [c17]Tom Vander Aa, Praveen Raghavan, Scott A. Mahlke, Bjorn De Sutter, Aviral Shrivastava, Frank Hannig: Compilation techniques for CGRAs: exploring all parallelization approaches. CODES+ISSS 2010: 185-186
- [c16]Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre: SDR platform for 802.11n and 3-GPP LTE. ICSAMOS 2010: 318-323
2000 – 2009
- 2008
- [j3]Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. Wouters, Andreas Kanstein, Steven Dupont: Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder. Signal Processing Systems 51(3): 225-243 (2008)
- [c15]Andres Garcia, Mladen Berekovic, Tom Vander Aa: Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor. ASAP 2008: 245-250
- [c14]Bjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei: Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays. LCTES 2008: 151-160
- [c13]Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest: Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS 2008: 449-457
- 2007
- [c12]Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter: A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots. CASES 2007: 229-237
- [c11]Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger, Bjorn De Sutter: Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. ESTImedia 2007: 67-72
- 2006
- [c10]Bjorn De Sutter, Bingfeng Mei, Andrei Bartic, Tom Vander Aa, Mladen Berekovic, Jean-Yves Mignolet, Kris Croes, Paul Coene, Miro Cupac, Aïssa Couvreur, Andy Folens, Steven Dupont, Bert Van Thielen, Andreas Kanstein, Hong-Seok Kim, Sukjin Kim: Hardware and a Tool Chain for ADRES. ARC 2006: 425-430
- [c9]Tom Vander Aa, Murali Jayapala, Henk Corporaal, Francky Catthoor, Geert Deconinck: Instruction Transfer And Storage Exploration for Low Energy VLIWs. SiPS 2006: 292-297
- 2005
- [j2]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor: Instruction buffering exploration for low energy embedded processors. J. Embedded Computing 1(3): 341-351 (2005)
- [j1]Murali Jayapala, Francisco Barat, Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck: Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors. IEEE Trans. Computers 54(6): 672-683 (2005)
- [c8]Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina: Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP 2005: 179-184
- [c7]Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck: Combining Data and Instruction Memory Energy Optimizations for Embedded Applications. ESTImedia 2005: 121-126
- 2004
- [c6]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal: Instruction buffering exploration for low energy VLIWs with instruction clusters. ASP-DAC 2004: 824-829
- [c5]Murali Jayapala, Tom Vander Aa, Francisco Barat, Francky Catthoor, Henk Corporaal, Geert Deconinck: L0 Cluster Synthesis and Operation Shuffling. PATMOS 2004: 311-321
- [c4]Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll: Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS 2004: 104-113
- [c3]Murali Jayapala, Tom Vander Aa, Francisco Barat, Geert Deconinck, Francky Catthoor, Henk Corporaal: L0 buffer energy optimization through scheduling and exploration. SAC 2004: 905-906
- 2003
- [c2]Francisco Barat, Murali Jayapala, Tom Vander Aa, Rudy Lauwereins, Geert Deconinck, Henk Corporaal: Low Power Coarse-Grained Reconfigurable Instruction Set Processor. FPL 2003: 230-239
- [c1]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor: Instruction Buffering Exploration for Low Energy Embedded Processors. PATMOS 2003: 409-419
Coauthor Index
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last updated on 2013-02-05 21:45 CET by the dblp team