| 2013 | ||
|---|---|---|
| c20 | Rajiv V. Joshi, Rouwaida Kanj, S. Butt, Emrah Acar, D. Lea, D. Sciacca: Hardware-corroborated Variability-Aware SRAM Methodology. VLSI Design 2013: 344-349 | |
| 2012 | ||
| c19 | Amith Singhee, Emrah Acar, Mohammad Imran Younus, Rama N. Singh, Aditya Bansal: DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAM. ISQED 2012: 470-476 | |
| 2011 | ||
| j5 | Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton: Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 30(12): 1814-1827 (2011) | |
| c18 | Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer: Abstraction and microarchitecture scaling in early-stage power modeling. HPCA 2011: 394-405 | |
| 2010 | ||
| c17 | Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar: Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation. ICCAD 2010: 47-54 | |
| 2009 | ||
| c16 | Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das: Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636 | |
| 2007 | ||
| j4 | Haifeng Qian, Emrah Acar: Timing-Aware Power Minimization via Extended Timing Graph Methods. J. Low Power Electronics 3(3): 318-326 (2007) | |
| j3 | Peng Li, Zhuo Feng, Emrah Acar: Characterizing Multistage Nonlinear Drivers and Variability for Accurate Timing and Noise Analysis. IEEE Trans. VLSI Syst. 15(11): 1205-1214 (2007) | |
| c15 | Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 | |
| 2006 | ||
| c14 | Emrah Acar, Kanak Agarwal, Sani R. Nassif: Characterization of total chip leakage using inverse (reciprocal) gamma distribution. ISCAS 2006 | |
| c13 | Emrah Acar, Peter Feldmann: Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). ISCAS 2006 | |
| c12 | Sani R. Nassif, Kanak Agarwal, Emrah Acar: Methods for estimating decoupling capacitance of nonswitching circuit blocks. ISCAS 2006 | |
| 2005 | ||
| j2 | Emrah Acar, Anirudh Devgan, Sani R. Nassif: Leakage and Leakage Sensitivity Computation for Combinational Circuits. J. Low Power Electronics 1(2): 172-181 (2005) | |
| c11 | ||
| 2003 | ||
| c10 | Emrah Acar, Ravishankar Arunachalam, Sani R. Nassif: Predicting short circuit power from timing models. ASP-DAC 2003: 277-282 | |
| c9 | Haihua Su, Emrah Acar, Sani R. Nassif: Power grid reduction based on algebraic multigrid principles. DAC 2003: 109-112 | |
| c8 | Haihua Su, Frank Liu, Anirudh Devgan, Emrah Acar, Sani R. Nassif: Full chip leakage estimation considering power supply and temperature variations. ISLPED 2003: 78-83 | |
| c7 | Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns: Leakage and leakage sensitivity computation for combinational circuits. ISLPED 2003: 96-99 | |
| c6 | Ravishankar Arunachalam, Emrah Acar, Sani R. Nassif: Optimal shielding/spacing metrics for low power design. ISVLSI 2003: 167-172 | |
| 2002 | ||
| j1 | Emrah Acar, Florentin Dartu, Lawrence T. Pileggi: TETA: transistor-level waveform evaluation for timing analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 605-616 (2002) | |
| c5 | Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi: A Linear-Centric Simulation Framework for Parametric Fluctuations. DATE 2002: 568-575 | |
| c4 | Emrah Acar, Sani R. Nassif, Ying Liu, Lawrence T. Pileggi: Time-Domain Simulation of Variational Interconnect Models. ISQED 2002: 419-424 | |
| 2001 | ||
| c3 | Emrah Acar, Lawrence T. Pileggi, Sani R. Nassif, Ying Liu: Assessment of True Worst Case Circuit Performance Under Interconnect Parameter Variations. ISQED 2001: 431-436 | |
| 1999 | ||
| c2 | Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi: S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. Great Lakes Symposium on VLSI 1999: 60-63 | |
| 1998 | ||
| c1 | Tao Lin, Emrah Acar, Lawrence T. Pileggi: h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response. ICCAD 1998: 19-25 | |
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