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Sumit Ahuja
2010 – today
- 2011
[c13]Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla: High Level Power Estimation Models for FPGAs. ISVLSI 2011: 7-12- 2010
[j4]Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla: Power Aware High Level Synthesis of Hardware Coprocessors. J. Low Power Electronics 6(3): 376-389 (2010)
[c12]Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep K. Shukla: The Model Checking View to Clock Gating and Operand Isolation. ACSD 2010: 181-190
[c11]Sumit Ahuja, Wei Zhang, Sandeep K. Shukla: System level simulation guided approach to improve the efficacy of clock-gating. HLDVT 2010: 9-16
[c10]Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla: Coprocessor design space exploration using high level synthesis. ISQED 2010: 879-884
[c9]Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla: A Methodology for Power Aware High-Level Synthesis of Co-processors from Software Algorithms. VLSI Design 2010: 282-287
2000 – 2009
- 2009
[j3]Sumit Ahuja, Swathi T. Gurumani, Chad Spackman, Sandeep K. Shukla: Hardware Coprocessor Synthesis from an ANSI C Specification. IEEE Design & Test of Computers 26(4): 58-67 (2009)
[j2]Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla: SCoPE: Statistical Regression Based Power Models for Co-Processors Power Estimation. J. Low Power Electronics 5(4): 407-415 (2009)
[c8]Sumit Ahuja, Sandeep K. Shukla: MCBCG: Model Checking Based Sequential Clock-Gating. HLDVT 2009: 20-25
[c7]Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar: Power estimation methodology for a high-level synthesis framework. ISQED 2009: 541-546
[c6]Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla: Accurate power estimation of hardware co-processors using system level simulation. SoCC 2009: 399-402- 2008
[c5]Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla: Applying Verification Collaterals for Accurate Power Estimation. MTV 2008: 61-66- 2007
[j1]Gaurav Singh, Jacob B. Schwartz, Sumit Ahuja, Sandeep K. Shukla: Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented Specifications. J. Low Power Electronics 3(2): 156-166 (2007)
[c4]Gaurav Singh, S. S. Ravi, Sumit Ahuja, Sandeep K. Shukla: Complexity of Scheduling in Synthesizing Hardware from Concurrent Action Oriented Specifications. Power-aware Computing Systems 2007
[c3]Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla: Model-driven test generation for system level validation. HLDVT 2007: 83-90
[c2]Eric Simpson, Pengyuan Yu, Patrick Schaumont, Sumit Ahuja, Sandeep K. Shukla: VT Matrix Multiply Design for MEMOCODE '07. MEMOCODE 2007: 95-96
[c1]Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar: Assertion-Based Modal Power Estimation. MTV 2007: 3-7
Coauthor Index
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last updated on 2012-12-02 22:14 CET by the dblp team



