| 2003 | ||
|---|---|---|
| e5 | Alexander V. Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso (Eds.): High Performance Computing, 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings. Lecture Notes in Computer Science 2858, Springer 2003, isbn 3-540-20359-1 | |
| 1992 | ||
| j3 | Yoshiyasu Takefuji, Kuo Chun Lee, Hideo Aiso: An artificial maximum neural network: a winner-take-all neuron model forcing the state of the system in a solution domain. Biological Cybernetics 67(3): 243-251 (1992) | |
| 1991 | ||
| j2 | Hideo Aiso: 25 Years of MITI and Its Influence on Computing Research in Japan. IEEE Computer 24(9): 99-100 (1991) | |
| 1989 | ||
| c26 | Jun Miyazaki, Kenji Takeda, Hideharu Amano, Hideo Aiso: A New Version of a Parallel Production System Machine, MANJI-II. IWDM 1989: 317-330 | |
| 1988 | ||
| c25 | Hideo Tamura, Hideo Aiso: Logic Programming Debugger Using Control Flow Specification. LP 1988: 67-81 | |
| 1987 | ||
| j1 | Rong Yang, Hideo Aiso: P-Prolog: A Parallel Logic Language Based on Exclusive Relation. New Generation Comput. 5(1): 79-95 (1987) | |
| c24 | Jun Miyazaki, Hideharu Amano, Kenji Takeda, Hideo Aiso: A Shared Memory Architecture for MANJI Production System Machine. IWDM 1987: 517-531 | |
| c23 | ||
| 1986 | ||
| c22 | Michio Isoda, Hideo Aiso, Noriyuki Kamibayashi, Yoshifumi Matsunaga: Model for Lexical Knowledge Base. COLING 1986: 451-453 | |
| c21 | Chizuko Saito, Hideharu Amano, Tomohiro Kudoh, Hideo Aiso: An Adaptable Cluster Structure of (SM)²-II. CONPAR 1986: 53-60 | |
| c20 | ||
| c19 | Gyo Osawa, Toshio Kawai, Hideo Aiso: Fault Tolerant Scheme on Partial Differential Equations. ICPP 1986: 413-416 | |
| c18 | Yasuro Shobatake, Hideo Aiso: A Unification Processor Based on a Uniformly Structured Cellular Hardware. ISCA 1986: 140-148 | |
| e4 | Hideo Aiso (Ed.): Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986. IEEE Computer Society 1986, isbn 0-8186-0719-X | |
| 1985 | ||
| c17 | Takakazu Kurokawa, Hideo Aiso: Polynomial Transformer. IEEE Symposium on Computer Arithmetic 1985: 153-158 | |
| c16 | Hideharu Amano, Taisuke Boku, Tomohiro Kudoh, Hideo Aiso: (SM)²-II: A New Version of the Sparse Matrix Solving Machine. ISCA 1985: 100-107 | |
| 1984 | ||
| c15 | Masahiro Nakazawa, Michio Isoda, Jun Miyazaki, Hideo Aiso: MILK: Multi Level Interactive Logic Simulator at Keio University: Experience in Using the Contraints Language. Expert Database Workshop 1984: 469-485 | |
| 1983 | ||
| c14 | Yoshiyasu Takefuji, Takakazu Kurokawa, Hideo Aiso: Fast matrix solver in GF(2). IEEE Symposium on Computer Arithmetic 1983: 138-143 | |
| c13 | Yoshiyasu Takefuji, Takakazu Kurokawa, Masato Ishizaki, Hideo Aiso: New Matrix Equation Solvers in GF(2) Employing Cramer with Chio Method. ICPP 1983: 47-50 | |
| c12 | Hideharu Amano, Takaichi Yoshida, Hideo Aiso: (SM)2: Sparse Matrix Solving Machine. ISCA 1983: 213-220 | |
| e3 | Harold W. Lawson Jr., Tilak Agerwala, Hans H. Heilborn, Hideo Aiso, Lars-Erik Thorelli, Jean-Loup Baer, Mario Tokoro (Eds.): Proceedings of the 10th Annual Symposium on Computer Architecture, 1983. ACM 1983, isbn 0-89791-101-6 | |
| 1982 | ||
| c11 | Noriyuki Kamibayashi, H. Ogawana, K. Nagayama, Hideo Aiso: Heart: An Operating System Nucleus Machine Implemented by Firmware. ASPLOS 1982: 195-204 | |
| c10 | Yasushi Kiyoki, Michio Isoda, K. Kojima, Katsumi Tanaka, A. Minematsu, Hideo Aiso: Performance Analysis for Parallel Processing Schemes of Relational Operations and a Relational Database Machine Architecture with Optimal Scheme Selection Mechanism. ICDCS 1982: 196-205 | |
| c9 | Yoshiyasu Takefuji, Koichiro Tsujino, Mari Ibuki, Hideo Aiso: A novel approach to parallel processing cryptosystem. ICPP 1982: 313-315 | |
| 1981 | ||
| c8 | Kazuo Seo, A. Minematsu, Hideo Aiso, Noriyuki Kamibayashi: A Look-Ahead Data Staging Architecture for Relational Data Base Machines. ISCA 1981: 389-406 | |
| c7 | Yasushi Kiyoki, Katsumi Tanaka, Hideo Aiso, Noriyuki Kamibayashi: Design and Evaluation of a Relational Data Base Machine Employing Advanced Data Structures and Algorithms. ISCA 1981: 407-424 | |
| 1980 | ||
| e2 | Jacques Lenfant, Barry R. Borgerson, Daniel E. Atkins, Keki B. Irani, David Kinniment, Hideo Aiso (Eds.): Proceedings of the 7th Annual Symposium on Computer Architecture, May 1980. ACM 1980 | |
| 1979 | ||
| c6 | ||
| c5 | Ken Sakamura, Kiochi Nakano, Yoshio Kato, Hideo Aiso: A New Approach to an Adaptive Computer - An Automatic Recovery Mechanism to Prevent the Occurance of Subtract Errors. ISCA 1979: 31-41 | |
| e1 | Barry R. Borgerson, E. Douglas Jensen, Harold W. Lawson Jr., Hideo Aiso, Garold S. Tjaden, Richard F. Welch, Philip Holmer, Len Haynes, Jerry Hommes, Ted Jones, Winifred Grelis, Rosalie Ashenfelter (Eds.): Proceedings of the 6th Annual Symposium on Computer Architecture, April 1979. ACM 1979 | |
| 1977 | ||
| c4 | Ryoichi Yoshikawa, Tatsuo Kimura, Yasuhiro Nara, Hideo Aiso: A multi-microprocessor approach to a high-speed and low-cost continuous-system simulation. AFIPS National Computer Conference 1977: 931-936 | |
| c3 | Tadao Ichikawa, Ken Sakamura, Hideo Aiso: ARES: a memory, capable of associating stored information through relevancy estimation. AFIPS National Computer Conference 1977: 947-954 | |
| c2 | Ken Sakamura, Hideaki Kitafusa, Yukio Takeyari, Hideo Aiso: A Debugging Machine - An Approach to an Adaptive Computer. IFIP Congress 1977: 23-28 | |
| 1974 | ||
| c1 | Hideo Aiso, Mario Tokoro, Shunichi Uchida, Hideki Mori, Noriyuki Kaneko, Motoo Shimada: A Very High-Speed Microprogrammable Pipeline Signal Processor. IFIP Congress 1974: 60-64 | |
Colors in the list of coauthors
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