Alaa R. Alameldeen

Alaa R. Alameldeen: Guest Editor's Introduction. J. Instruction-Level Parallelism 13 (2011)

Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu: Adaptive Cache Design to Enable Reliable Low-Voltage Operation. IEEE Trans. Computers 60(1): 50-63 (2011)

Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu: Energy-efficient cache design using variable-strength error-correcting codes. ISCA 2011: 461-472

Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu: Reducing cache power with low-cost, multi-bit error-correcting codes. ISCA 2010: 83-93

Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu: Trading Off Cache Capacity for Low-Voltage Operation. IEEE Micro 29(1): 96-103 (2009)

Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson: Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors. IEEE Trans. VLSI Syst. 17(12): 1679-1690 (2009)

Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu: Improving cache lifetime reliability at ultra-low voltages. MICRO 2009: 89-99

Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu: Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. ISCA 2008: 203-214

Alaa R. Alameldeen, David A. Wood: Interactions Between Compression and Prefetching in Chip Multiprocessors. HPCA 2007: 228-239

Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson: Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. ISLPED 2007: 50-55

Alaa R. Alameldeen, David A. Wood: IPC Considered Harmful for Multiprocessor Workloads. IEEE Micro 26(4): 8-17 (2006)

Milo M. K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood: Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. SIGARCH Computer Architecture News 33(4): 92-99 (2005)

Alaa R. Alameldeen, David A. Wood: Adaptive Cache Compression for High-Performance Processors. ISCA 2004: 212-223

Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, Daniel J. Sorin: Simulating a $2M Commercial Server on a $2K PC. IEEE Computer 36(2): 50-57 (2003)

Alaa R. Alameldeen, David A. Wood: Addressing Workload Variability in Architectural Simulations. IEEE Micro 23(6): 94-98 (2003)

Alaa R. Alameldeen, David A. Wood: Variability in Architectural Simulations of Multi-Threaded Workloads. HPCA 2003: 7-18

Ashraf Aboulnaga, Alaa R. Alameldeen, Jeffrey F. Naughton: Estimating the Selectivity of XML Path Expressions for Internet Scale Applications. VLDB 2001: 591-600

Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood: Timestamp snooping: an approach for extending SMPs. ASPLOS 2000: 25-36