Marko Aleksic

Brian S. Leibowitz, Robert Palmer, John Poulton, Yohan Frans, Simon Li, John Wilson, Michael Bucher, Andrew M. Fuller, John G. Eyles, Marko Aleksic, Trey Greer, Nhat Nguyen: A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling. J. Solid-State Circuits 45(4): 889-898 (2010)

Marko Aleksic, Peyman Razaghi, Wei Yu: Capacity of a Class of Modulo-Sum Relay Channels. IEEE Transactions on Information Theory 55(3): 921-930 (2009)

Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija: Jitter Analysis of Nonautonomous MOS Current-Mode Logic Circuits. IEEE Trans. on Circuits and Systems 55-I(10): 3038-3049 (2008)

Marko Aleksic, Peyman Razaghi, Wei Yu: Capacity of a Class of Modulo-Sum Relay Channels. CoRR abs/0704.3591 (2007)

Rastislav Lukac, Konstantinos N. Plataniotis, Dimitrios Hatzinakos, Marko Aleksic: A new CFA interpolation framework. Signal Processing 86(7): 1559-1579 (2006)

Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija: A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers. PATMOS 2005: 724-732

Rastislav Lukac, Konstantinos N. Plataniotis, Dimitrios Hatzinakos, Marko Aleksic: A novel cost effective demosaicing approach. IEEE Trans. Consumer Electronics 50(1): 256-261 (2004)

Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Comparative analysis of double-edge versus single-edge triggered clocked storage elements. ISCAS (5) 2002: 105-108

Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Conditional pre-charge techniques for power-efficient dual-edge clocking. ISLPED 2002: 56-59

Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Timing Characterization of Dual-edge Triggered Flip-flops. ICCD 2001: 538-541