Guido Araujo

Daniel Nicácio, Alexandro Baldassin, Guido Araujo: Transaction Scheduling Using Dynamic Conflict Avoidance. International Journal of Parallel Programming 41(1): 89-110 (2013)

André Loureiro, João Paulo Porto, Guido Araujo: Extending decoupled software pipeline to parallelize Java programs. Softw., Pract. Exper. 43(5): 525-541 (2013)

Bruno Albertini, Sandro Rigo, Guido Araujo: Computational reflection and its application to platform verification. Design Autom. for Emb. Sys. 16(1): 1-17 (2012)

Daniel Nicácio, Alexandro Baldassin, Guido Araujo: LUTS: A Lightweight User-Level Transaction Scheduler. ICA3PP (1) 2011: 144-157

Edson Borin, Guido Araujo, Mauricio Breternitz Jr., Youfeng Wu: Structure-Constrained Microcode Compression. SBAC-PAD 2011: 104-111

Roberto Gallo, Henrique Kawakami, Ricardo Dahab, Rafael Azevedo, Saulo Lima, Guido Araujo: T-DRE: a hardware trusted computing base for direct recording electronic vote machines. ACSAC 2010: 191-198

Daniel Nicácio, Guido Araujo: Reducing False Aborts in STM Systems. ICA3PP (1) 2010: 499-510

João Paulo Porto, Guido Araujo, Edson Borin, Youfeng Wu: Trace Execution Automata in Dynamic Binary Translation. ISCA Workshops 2010: 99-116

Maxwell Souza, Daniel Nicácio, Guido Araujo: ISAMAP: Instruction Mapping Driven by Dynamic Binary Translation. ISCA Workshops 2010: 117-138

João Antonio Martino, Guido Araujo, Alex Orailoglu, Felipe Klein (Eds.): Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2010, São Paulo, Brazil, September 6-9, 2010. ACM 2010, isbn 978-1-4503-0152-7

Alexandro Baldassin, Felipe Klein, Guido Araujo, Rodolfo Azevedo, Paulo Centoducatte: Characterizing the Energy Consumption of Software Transactional Memory. Computer Architecture Letters 8(2): 56-59 (2009)

Felipe Klein, Roberto Leao, Guido Araujo, Luiz C. V. dos Santos, Rodolfo Azevedo: A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization. IEEE Trans. VLSI Syst. 17(5): 660-673 (2009)

Felipe Klein, Alexandro Baldassin, Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo: On the energy-efficiency of software transactional memory. SBCCI 2009

Ricardo Santos, Rodolfo Azevedo, Guido Araujo: Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor. J. UCS 14(21): 3465-3480 (2008)

Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab: A Custom Instruction Approach for Hardware and Software Implementations of Finite Field Arithmetic over F_2¹⁶³ using Gaussian Normal Bases. VLSI Signal Processing 47(1): 59-76 (2007)

Bruno Albertini, Sandro Rigo, Guido Araujo, Cristiano C. de Araujo, Edna Barros, Willians Azevedo: A computational reflection mechanism to support platform debugging in SystemC. CODES+ISSS 2007: 81-86

Fabio Augusto Cappabianco, Guido Araujo, Alexandre X. Falcão: The Image Forest Transform Architecture. FPT 2007: 137-144

Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: A multi-model power estimation engine for accuracy optimization. ISLPED 2007: 280-285

Richard Maciel, Bruno Albertini, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. ISVLSI 2007: 351-356

Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: On the Limitations of Power Macromodeling Techniques. ISVLSI 2007: 395-400

Fernando Kronbauer, Alexandro Baldassin, Bruno Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. IEEE International Workshop on Rapid System Prototyping 2007: 123-129

Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers: Offset assignment using simultaneous variable coalescing. ACM Trans. Embedded Comput. Syst. 5(4): 864-883 (2006)

Ricardo Santos, Rodolfo Azevedo, Guido Araujo: 2D-VLIW: An Architecture Based on the Geometry of Computation. ASAP 2006: 87-94

Edson Borin, Cheng Wang, Youfeng Wu, Guido Araujo: Software-Based Transparent and Comprehensive Control-Flow Error Detection. CGO 2006: 333-345

Edson Borin, Mauricio Breternitz Jr., Youfeng Wu, Guido Araujo: Clustering-Based Microcode Compression. ICCD 2006

Ricardo Santos, Rodolfo Azevedo, Guido Araujo: Exploiting dynamic reconfiguration techniques: the 2D-VLIW approach. IPDPS 2006

Guido Araujo, Edna Barros, Elmar U. K. Melcher, Rodolfo Azevedo, Karina R. G. da Silva, Bruno Prado, Manoel Eusebio de Lima: A SystemC-only design methodology and the CINE-IP multimedia platform. Design Autom. for Emb. Sys. 10(2-3): 181-202 (2005)

Cristiano C. de Araujo, Millena Gomes, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Platform designer: An approach for modeling multiprocessor platforms based on SystemC. Design Autom. for Emb. Sys. 10(4): 253-283 (2005)

Rodolfo Azevedo, Sandro Rigo, Marcus Bartholomeu, Guido Araujo, Cristiano C. de Araujo, Edna Barros: The ArchC Architecture Description Language and Tools. International Journal of Parallel Programming 33(5): 453-484 (2005)

Cid C. de Souza, André M. Lima, Guido Araujo, Nahri Moreano: The datapath merging problem in reconfigurable systems: Complexity, dual bounds and heuristic evaluation. ACM Journal of Experimental Algorithmics 10 (2005)

Edson Borin, Cheng Wang, Youfeng Wu, Guido Araujo: Dynamic binary control-flow errors detection. SIGARCH Computer Architecture News 33(5): 15-20 (2005)

Nahri Moreano, Edson Borin, Cid C. de Souza, Guido Araujo: Efficient datapath merging for partially reconfigurable architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 969-980 (2005)

Cristiano C. de Araujo, Edna Barros, Rodolfo Azevedo, Guido Araujo: Processor Centric Specification and Modelling of MPSoCs. FDL 2005: 303-315

Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab: A custom instruction approach for hardware and software implementations of finite field arithmetic over F_2⁶³ using Gaussian normal bases. FPT 2005: 5-12

Richard E. Billo, Rodolfo Azevedo, Guido Araujo, Paulo Centoducatte, Eduardo Wanderley Netto: Design of a decompressor engine on a SPARC processor. SBCCI 2005: 110-114

Zhining Huang, Sharad Malik, Nahri Moreano, Guido Araujo: The design of dynamically reconfigurable datapath coprocessors. ACM Trans. Embedded Comput. Syst. 3(2): 361-384 (2004)

Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-profile based code compression. DAC 2004: 244-249

Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. DATE 2004: 734-735

Edson Borin, Felipe Klein, Nahri Moreano, Rodolfo Azevedo, Guido Araujo: Fast instruction set custornization. ESTImedia 2004: 53-58

Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-Profile Instruction Based Compression. SBAC-PAD 2004: 23-29

Sandro Rigo, Guido Araujo, Marcus Bartholomeu, Rodolfo Azevedo: ArchC: A SystemC-Based Architecture Description Language. SBAC-PAD 2004: 66-73

Marcus Bartholomeu, Rodolfo Azevedo, Sandro Rigo, Guido Araujo: Optimizations for Compiled Simulation Using Instruction Type Information. SBAC-PAD 2004: 74-81

Karina R. G. da Silva, Elmar U. K. Melcher, Guido Araujo, Valdiney Alves Pimenta: An automatic testbench generation tool for a SystemC functional verification methodology. SBCCI 2004: 66-70

Cid C. de Souza, André M. Lima, Nahri Moreano, Guido Araujo: The Datapath Merging Problem in Reconfigurable Systems: Lower Bounds and Heuristic Evaluation. WEA 2004: 545-558

Guilherme Ottoni, Guido Araujo: Address register allocation for arrays in loops of embedded programs. Microelectronics Journal 34(11): 1009-1018 (2003)

Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Exploring Memory Hierarchy with ArchC. SBAC-PAD 2003: 2-9

Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers: Improving Offset Assignment through Simultaneous Variable Coalescing. SCOPES 2003: 285-297

Guido Araujo, Guilherme Ottoni, Marcelo Silva Cintra: Global array reference allocation. ACM Trans. Design Autom. Electr. Syst. 7(2): 336-357 (2002)

Guido Araujo, Sharad Malik, Zhining Huang, Nahri Moreano: Datapath Merging and Interconnection Sharing for Reconfigurable Architectures. ISSS 2002: 38-43

Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama: A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1319-1328 (2001)

Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. CASES 2001: 141-148

Guilherme Ottoni, Sandro Rigo, Guido Araujo, Subramanian Rajagopalan, Sharad Malik: Optimal Live Range Merge for Address Register Allocation in Embedded Programs. CC 2001: 274-288

Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo, Ricardo Pannain: Expression-tree-based algorithms for code compression on embedded RISC architectures. IEEE Trans. VLSI Syst. 8(5): 530-533 (2000)

Marcelo Silva Cintra, Guido Araujo: Array Reference Allocation Using SSA-Form and Live Range Growth. LCTES 2000: 48-62

Paulo Centoducatte, Ricardo Pannain, Guido Araujo: Compressed Code Execution on DSP Architectures. ISSS 1999: 56-63

Guido Araujo, Sharad Malik: Code generation for fixed-point DSPs. ACM Trans. Design Autom. Electr. Syst. 3(2): 136-161 (1998)

Guido Araujo, Paulo Centoducatte, Mario Cartes, Ricardo Pannain: Code Compression Based on Operand Factorization. MICRO 1998: 194-201

Guido Araujo, Sharad Malik, Mike Tien-Chien Lee: Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures. DAC 1996: 591-596

Guido Araujo, Ashok Sudarsanam, Sharad Malik: Instruction Set Design and Optimizations for Address Computation in DSP Architectures. ISSS 1996: 102-107

Guido Araujo, Sharad Malik: Optimal code generation for embedded memory non-homogeneous register architectures. ISSS 1995: 36-41

Guido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert Wang: Challenges in code generation for embedded processors. Code Generation for Embedded Processors 1994: 48-64