James H. Aylor

Mark A. Hanson, Harry C. Powell Jr., Adam T. Barth, Kyle Ringgenberg, Benton H. Calhoun, James H. Aylor, John Lach: Body Area Sensor Networks: Challenges and Opportunities. IEEE Computer 42(1): 58-65 (2009)

Doris L. Carver, Ronald G. Hoelzeman, James H. Aylor, Michael G. Hinchey: Special Issue Introduction: The IEEE Computer Society's 60th Anniversary. IEEE Computer 39(10): 22-25 (2006)

Zachary D. Buckner, Michael L. Reed, James H. Aylor: Antialiasing Encoder Interface With Sub-Nyquist Sampling. IEEE T. Instrumentation and Measurement 55(6): 2029-2033 (2006)

Murali K. Nethi, James H. Aylor: Advances in Modelling and Simulation of Large Parallel/distributed Systems. Parallel Processing Letters 15(4): 397-406 (2005)

Yong Ma, James H. Aylor: System Lifetime Optimization for Heterogeneous Sensor Networks with a Hub-Spoke Topology. IEEE Trans. Mob. Comput. 3(3): 286-294 (2004)

Robert H. Klenke, James H. Aylor: A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates. MSE 2003: 27-28

Jason J. Hein, James H. Aylor, Robert H. Klenke: Performance-Based System Design Education. MSE 2003: 35-36

James H. Aylor: The End of Computing Disciplines as We Know Them? IEEE Computer 35(1): 4-5 (2002)

James H. Aylor: EIC's Message: It has been a Great Ride! IEEE Computer 35(12): 12 (2002)

James H. Aylor: Can We Work Together? IEEE Computer 34(1): 4 (2001)

James H. Aylor: Keep on Keepin' on. IEEE Computer 34(8): 6-7 (2001)

Robert H. Klenke, James H. Aylor, Moshe Meyassed, William W. Dungan: Interfaces for mixed-level simulation with sequential elements. Journal of Systems Architecture 47(2): 87-101 (2001)

Gang Han, Robert H. Klenke, James H. Aylor: Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems. IEEE Trans. Computers 50(9): 877-890 (2001)

James H. Aylor: New Computer Departments Reflect our Changing Industry. IEEE Computer 33(3): 4-6 (2000)

Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle: Dynamic Access Ordering for Streamed Computations. IEEE Trans. Computers 49(11): 1255-1271 (2000)

Tianjing Jiang, Robert H. Klenke, James H. Aylor, Gang Han: System level testability analysis using Petri nets. HLDVT 2000: 112-117

James H. Aylor: Computer for the 21st Century. IEEE Computer 32(1): 4-6 (1999)

Moshe Meyassed, Robert H. Klenke, James H. Aylor: Resolving unknown inputs in mixed-level simulation with sequential elements. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1151-1164 (1999)

Sung I. Hong, Sally A. McKee, Maximo H. Salinas, Robert H. Klenke, James H. Aylor, William A. Wulf: Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory. HPCA 1999: 80-89

Sally A. McKee, Robert H. Klenke, Kenneth L. Wright, William A. Wulf, Maximo H. Salinas, James H. Aylor, Alan P. Baston: Smarter Memory: Improving Bandwidth for Streamed References. IEEE Computer 31(7): 54-63 (1998)

Robert M. McGraw, James H. Aylor, Robert H. Klenke: A Top-Down Design Environment for Developing Pipelined Datapaths. DAC 1998: 236-241

Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh: An Integrated Design Environment for Performance and Dependability Analysis. DAC 1997: 184-189

Joseph M. Wolf, Lori M. Kaufman, Robert H. Klenke, James H. Aylor, Ronald Waxman: An analysis of fault partitioned parallel test generation. IEEE Trans. on CAD of Integrated Circuits and Systems 15(5): 517-534 (1996)

Sally A. McKee, Assaji Aluwihare, Benjamin H. Clark, Robert H. Klenke, Trevor C. Landon, Christopher W. Oliver, Maximo H. Salinas, Adam E. Szymkowiak, Kenneth L. Wright, William A. Wulf, James H. Aylor: Design and Evaluation of Dynamic Access Ordering Hardware. International Conference on Supercomputing 1996: 125-132

Robert H. Klenke, James H. Aylor, Joseph M. Wolf: An analysis of fault partitioning algorithms for fault partitioned ATPG. VTS 1996: 231-239

Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams: Refinement of system-level designs using hybrid modeling. ICECCS 1995: 409-416

Sanjaya Kumar, James H. Aylor, Barry W. Johnson, William A. Wulf: Object-Oriented Techniques in Hardware Design. IEEE Computer 27(6): 64-70 (1994)

Sally A. McKee, Robert H. Klenke, Andrew J. Schwab, William A. Wulf, Steven A. Moyer, James H. Aylor, Charles Y. Hitchcock: Experimental Implementation of Dynamic Access Ordering. HICSS (1) 1994: 431-440

Sanjay Srinivasan, James H. Aylor: Digital Circuit Testing on a Network of Workstations. ICPP (3) 1994: 115-118

Sanjaya Kumar, James H. Aylor, Barry W. Johnson, William A. Wulf: A Framework for Hardware / Software Codesign. IEEE Computer 26(12): 39-45 (1993)

Maximo H. Salinas, Barry W. Johnson, James H. Aylor: Implementation-Independent Model of an Instruction Set Architecture in VHDL. IEEE Design & Test of Computers 10(3): 42-54 (1993)

Robert H. Klenke, Lori M. Kaufman, James H. Aylor, Ronald Waxman, Padmini Narayan: Workstation Based Parallel Test Generation. ITC 1993: 419-428

Robert H. Klenke, Ronald D. Williams, James H. Aylor: Parallel-Processing Techniques for Automatic Test Pattern Generation. IEEE Computer 25(1): 71-84 (1992)

James H. Aylor, Raul Camposano, Michael A. Schuette, Wayne Wolf, Nam S. Woo: The Future of Embedded System Design. ICCD 1992: 144-146

James H. Aylor, Roy L. Russo, Bruce Shriver: The Promise of the Next Decade (Guest Editors' Introduction). IEEE Computer 24(9): 15-16 (1991)

Maximo H. Salinas, Barry W. Johnson, James H. Aylor: Implementation-Independent Model of an Instruction Set Architecture Using VHDL. ICCD 1991: 140-145

Bany W. Johnson, James H. Aylor: Reliability and safety analysis in medical applications of computer technology. CBMS 1988: 96-100

Ronald Waxman, James H. Aylor, Erich Marschner: The VHSIC Hardware Description Language (IEEE Standard 1076): Language Features Revisited. COMPCON 1988: 310-315