| 2010 | ||
|---|---|---|
| c2 | Jürgen Pille, Dieter F. Wendel, Otto Wagner, Rolf Sautter, Wolfgang Penth, Thomas Fröhnel, Stefan Büttner, Otto A. Torreiter, Martin Eckert, Jose Paredes, David Hrusecky, David Ray, Miles Canada: A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor. ISSCC 2010: 344-345 | |
| 2006 | ||
| c1 | Nicolas Mäding, Jens Leenstra, Juergen Pille, Rolf Sautter, Stefan Büttner, S. Ehrenreich, W. Haller: The vector fixed point unit of the synergistic processor element of the cell architecture processor. DATE Designers' Forum 2006: 244-248 | |
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