Iuliana Bacivarov

Lars Schor, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele: Worst-case temperature analysis for different resource models. IET Circuits, Devices & Systems 6(5): 297-307 (2012)

Kai Huang, Wolfgang Haid, Iuliana Bacivarov, Matthias Keller, Lothar Thiele: Embedding formal performance analysis into the design cycle of MPSoCs for real-time streaming applications. ACM Trans. Embedded Comput. Syst. 11(1): 8 (2012)

Devendra Rai, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele: Power agnostic technique for efficient temperature estimation of multicore embedded systems. CASES 2012: 61-70

Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-Haeng Kang, Lothar Thiele: Scenario-based design flow for mapping streaming applications onto on-chip many-core systems. CASES 2012: 71-80

Olivera Jovanovic, Peter Marwedel, Iuliana Bacivarov, Lothar Thiele: MAMOT: Memory-Aware Mapping Optimization Tool for MPSoC. DSD 2012: 743-750

Shin-Haeng Kang, Hoeseok Yang, Lars Schor, Iuliana Bacivarov, Soonhoi Ha, Lothar Thiele: Multi-objective mapping optimization via problem decomposition for many-core systems. ESTImedia 2012: 28-37

Lars Schor, Iuliana Bacivarov, Hoeseok Yang, Lothar Thiele: Worst-Case Temperature Guarantees for Real-Time Applications on Multi-core Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2012: 87-96

Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang: Mapping of applications to MPSoCs. CODES+ISSS 2011: 109-118

Lothar Thiele, Lars Schor, Hoeseok Yang, Iuliana Bacivarov: Thermal-aware system analysis and software synthesis for embedded multi-processors. DAC 2011: 268-273

Devendra Rai, Hoeseok Yang, Iuliana Bacivarov, Jian-Jia Chen, Lothar Thiele: Worst-case temperature analysis for real-time systems. DATE 2011: 631-636

Christian Fabre, Iuliana Bacivarov, Ananda Basu, Martino Ruggiero, David Atienza, Eric Flamand, Jean-Pierre Krimm, Julien Mottin, Lars Schor, Pratyush Kumar, Hoeseok Yang, Devesh B. Chokshi, Lothar Thiele, Saddek Bensalem, Marius Bozga, Luca Benini, Mohamed M. Sabry, Yusuf Leblebici, Giovanni De Micheli, Diego Melpignano: PRO3D, Programming for Future 3D Manycore Architectures: Project's Interim Status. FMCO 2011: 277-293

Lars Schor, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele: Thermal-Aware Task Assignment for Real-Time Applications on Multi-Core Systems. FMCO 2011: 294-313

Lars Schor, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele: Worst-Case Temperature Analysis for Different Resource Availabilities: A Case Study. PATMOS 2011: 288-297

Wolfgang Haid, Lars Schor, Kai Huang, Iuliana Bacivarov, Lothar Thiele: Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs. ESTImedia 2009: 35-44

Wolfgang Haid, Matthias Keller, Kai Huang, Iuliana Bacivarov, Lothar Thiele: Generation and calibration of compositional performance analysis models for multi-processor systems. ICSAMOS 2009: 92-99

Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Haid: A modular fast simulation framework for stream-oriented MPSoC. SIES 2009: 74-81

Kai Huang, Iuliana Bacivarov, Fabian Hugelshofer, Lothar Thiele: Scalably distributed SystemC simulation for embedded applications. SIES 2008: 271-274

Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang: Mapping Applications to Tiled Multiprocessor Embedded Systems. ACSD 2007: 29-40

Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya: Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. DATE Designers' Forum 2006: 166-171

Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES 1(1/2): 103-111 (2005)

Aimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed Amine Jerraya: Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. ASP-DAC 2005: 969-972

Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya: Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. DATE 2003: 10550-10555

Iuliana Bacivarov, Sungjoo Yoo, Ahmed Amine Jerraya: Timed HW-SW cosimulation using native execution of OS and application SW. HLDVT 2002: 51-56