| 2013 | ||
|---|---|---|
| j14 | Matthew S. Simpson, Rajeev Barua: MemSafe: ensuring the spatial and temporal memory safety of C at runtime. Softw., Pract. Exper. 43(1): 93-128 (2013) | |
| j13 | Leila Ismail, Rajeev Barua: Implementation and performance evaluation of a distributed conjugate gradient method in a cloud computing environment. Softw., Pract. Exper. 43(3): 281-304 (2013) | |
| c29 | Kapil Anand, Matthew Smithson, Khaled Elwazeer, Aparna Kotha, Jim Gruen, Nathan Giles, Rajeev Barua: A compiler-level intermediate representation based binary analysis and rewriting system. EuroSys 2013: 295-308 | |
| 2011 | ||
| j12 | George C. Caragea, Alexandros Tzannes, Fuat Keceli, Rajeev Barua, Uzi Vishkin: Resource-Aware Compiler Prefetching for Fine-Grained Many-Cores. International Journal of Parallel Programming 39(5): 615-638 (2011) | |
| c28 | Alexandros Tzannes, Rajeev Barua, Uzi Vishkin: Improving Run-Time Scheduling for General-Purpose Parallel Code. PACT 2011: 216 | |
| c27 | Fuat Keceli, Alexandros Tzannes, George C. Caragea, Rajeev Barua, Uzi Vishkin: Toolchain for Programming, Simulating and Studying the XMT Many-Core Architecture. IPDPS Workshops 2011: 1282-1291 | |
| c26 | Pádraig O'Sullivan, Kapil Anand, Aparna Kotha, Matthew Smithson, Rajeev Barua, Angelos D. Keromytis: Retrofitting Security in COTS Software with Binary Rewriting. SEC 2011: 154-172 | |
| 2010 | ||
| c25 | George C. Caragea, Alexandros Tzannes, Fuat Keceli, Rajeev Barua, Uzi Vishkin: Resource-Aware Compiler Prefetching for Many-Cores. ISPDC 2010: 133-140 | |
| c24 | Aparna Kotha, Kapil Anand, Matthew Smithson, Greeshma Yellareddy, Rajeev Barua: Automatic Parallelization in a Binary Rewriter. MICRO 2010: 547-557 | |
| c23 | Alexandros Tzannes, George C. Caragea, Rajeev Barua, Uzi Vishkin: Lazy binary-splitting: a run-time adaptive work-stealing scheduler. PPOPP 2010: 179-190 | |
| c22 | Matthew S. Simpson, Rajeev Barua: MemSafe: Ensuring the Spatial and Temporal Memory Safety of C at Runtime. SCAM 2010: 199-208 | |
| e1 | Vinod Kathail, Reid Tatge, Rajeev Barua (Eds.): Proceedings of the 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2010, Scottsdale, AZ, USA, October 24-29, 2010. ACM 2010, isbn 978-1-60558-903-9 | |
| 2009 | ||
| j11 | Nghi Nguyen, Angel Dominguez, Rajeev Barua: Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. ACM Trans. Embedded Comput. Syst. 8(3) (2009) | |
| c21 | ||
| 2008 | ||
| j10 | Bhuvan Middha, Matthew S. Simpson, Rajeev Barua: MTSS: Multitask stack sharing for embedded systems. ACM Trans. Embedded Comput. Syst. 7(4) (2008) | |
| 2007 | ||
| c20 | Angel Dominguez, Nghi Nguyen, Rajeev Barua: Recursive function data allocation to scratch-pad memory. CASES 2007: 65-74 | |
| c19 | Nghi Nguyen, Angel Dominguez, Rajeev Barua: Scratch-pad memory allocation without compiler support for java applications. CASES 2007: 85-94 | |
| 2006 | ||
| j9 | Sumesh Udayakumaran, Angel Dominguez, Rajeev Barua: Dynamic allocation for scratch-pad memory using compile-time decisions. ACM Trans. Embedded Comput. Syst. 5(2): 472-511 (2006) | |
| j8 | Surupa Biswas, Thomas W. Carley, Matthew S. Simpson, Bhuvan Middha, Rajeev Barua: Memory overflow protection for embedded systems using run-time checks, reuse, and compression. ACM Trans. Embedded Comput. Syst. 5(4): 719-752 (2006) | |
| c18 | Sumesh Udayakumaran, Rajeev Barua: An integrated scratch-pad allocator for affine and non-affine code. DATE 2006: 925-930 | |
| 2005 | ||
| j7 | Steve Haga, Andrew Webber, Yi Zhang, Nghi Nguyen, Rajeev Barua: Reducing code size in VLIW instruction scheduling. J. Embedded Computing 1(3): 415-433 (2005) | |
| j6 | Angel Dominguez, Sumesh Udayakumaran, Rajeev Barua: Heap data allocation to scratch-pad memory in embedded systems. J. Embedded Computing 1(4): 521-540 (2005) | |
| j5 | Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu: Dynamic Functional Unit Assignment for Low Power. The Journal of Supercomputing 31(1): 47-62 (2005) | |
| c17 | Matthew S. Simpson, Bhuvan Middha, Rajeev Barua: Segment protection for embedded systems using run-time checks. CASES 2005: 66-77 | |
| c16 | Nghi Nguyen, Angel Dominguez, Rajeev Barua: Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. CASES 2005: 115-125 | |
| c15 | Bhuvan Middha, Matthew S. Simpson, Rajeev Barua: MTSS: multi task stack sharing for embedded systems. CASES 2005: 191-201 | |
| 2004 | ||
| j4 | Yi Zhang, Steve Haga, Rajeev Barua: Execution History Guided Instruction Prefetching. The Journal of Supercomputing 27(2): 129-147 (2004) | |
| c14 | Surupa Biswas, Matthew S. Simpson, Rajeev Barua: Memory overflow protection for embedded systems using run-time checks, reuse and compression. CASES 2004: 280-291 | |
| 2003 | ||
| c13 | Sumesh Udayakumaran, Rajeev Barua: Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. CASES 2003: 276-286 | |
| c12 | Steve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu: Dynamic Functional Unit Assignment for Low Power. DATE 2003: 11052-11057 | |
| c11 | Thomas W. Carley, Moussa A. Ba, Rajeev Barua, David B. Stewart: Contention-Free Periodic Message Scheduler Medium Access Control in Wireless Sensor / Actuator Networks. RTSS 2003: 298-307 | |
| 2002 | ||
| j3 | Oren Avissar, Rajeev Barua, Dave Stewart: An optimal memory allocation scheme for scratch-pad-based embedded systems. ACM Trans. Embedded Comput. Syst. 1(1): 6-26 (2002) | |
| c10 | T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua: Compiler-directed customization of ASIP cores. CODES 2002: 97-102 | |
| c9 | Yi Zhang, Steve Haga, Rajeev Barua: Execution history guided instruction prefetching. ICS 2002: 199-208 | |
| 2001 | ||
| j2 | Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Compiler Support for Scalable and Efficient Memory Systems. IEEE Trans. Computers 50(11): 1234-1247 (2001) | |
| c8 | Oren Avissar, Rajeev Barua, Dave Stewart: Heterogeneous memory management for embedded systems. CASES 2001: 34-43 | |
| c7 | Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan: Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 285-338 | |
| 1999 | ||
| c6 | Jonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe: Parallelizing Applications into Silicon. FCCM 1999: 70- | |
| c5 | Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Maps: A Compiler-Managed Memory System for Raw Machines. ISCA 1999: 4-15 | |
| 1998 | ||
| c4 | Walter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe: Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. ASPLOS 1998: 46-57 | |
| c3 | Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal: The Sensitivity of Communication Mechanisms to Bandwidth and Latency. HPCA 1998: 37-46 | |
| 1997 | ||
| j1 | Elliot Waingold, Michael Bedford Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal: Baring It All to Software: Raw Machines. IEEE Computer 30(9): 86-93 (1997) | |
| c2 | Jonathan Babb, Matthew Frank, Victor Lee, Elliot Waingold, Rajeev Barua, Michael Bedford Taylor, Jang Kim, Devabhaktuni Srikrishna, Anant Agarwal: The RAW benchmark suite: computation structures for general purpose computing. FCCM 1997: 134-144 | |
| 1996 | ||
| c1 | Rajeev Barua, David A. Kranz, Anant Agarwal: Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors. LCPC 1996: 350-368 | |
Colors in the list of coauthors
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