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 | 2013 | |
|---|---|---|
| c14 |      | Christian Beckhoff, Dirk Koch, Jim Torresen: Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead. ARCS 2013: 303-316 |
| 2012 | ||
| c13 | | Dirk Koch, Jim Torresen, Christian Beckhoff, Daniel Ziener, Christopher Dennl, Volker Breuer, Jürgen Teich, Michael Feilen, Walter Stechele: Partial Reconfiguration on FPGAs in Practice - Tools and Applications. ARCS Workshops 2012: 297-319 |
| c12 | | Christian Beckhoff, Dirk Koch, Jim Torresen: Go Ahead: A Partial Reconfiguration Framework. FCCM 2012: 37-44 |
| 2011 | ||
| c11 | | Christian Beckhoff, Dirk Koch, Jim Torresen: Migrating Static Systems to Partially Reconfigurable Systems on Spartan-6 FPGAs. IPDPS Workshops 2011: 212-219 |
| c10 | | Christian Beckhoff, Dirk Koch, Jim Tørresen: The Xilinx Design Language (XDL): Tutorial and use cases. ReCoSoC 2011: 1-8 |
| 2010 | ||
| c9 | | Dirk Koch, Christian Beckhoff, Jim Tørresen: Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs. FCCM 2010: 69-72 |
| c8 | | Christian Beckhoff, Dirk Koch, Jim Torresen: Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration. FPL 2010: 596-601 |
| c7 | | Dirk Koch, Christian Beckhoff, Jim Torresen: Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems. FPT 2010: 208-215 |
| c6 | | Dirk Koch, Christian Beckhoff, Jim Tørresen: Advanced partial run-time reconfiguration on Spartan-6 FPGAs. FPT 2010: 361-364 |
| c5 | | Dirk Koch, Christian Beckhoff, Jim Torresen: Zero logic overhead integration of partially reconfigurable modules. SBCCI 2010: 103-108 |
| 2009 | ||
| j1 | | Dirk Koch, Christian Beckhoff, Jürgen Teich: Hardware Decompression Techniques for FPGA-Based Embedded Systems. TRETS 2(2) (2009) |
| c4 | | Dirk Koch, Christian Beckhoff, Jürgen Teich: Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems. FCCM 2009: 251-254 |
| c3 | | Dirk Koch, Christian Beckhoff, Jürgen Teich: A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. FPGA 2009: 253-256 |
| 2008 | ||
| c2 | | Dirk Koch, Christian Beckhoff, Jürgen Teich: ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS. FPL 2008: 119-124 |
| 2007 | ||
| c1 | | Dirk Koch, Christian Beckhoff, Jürgen Teich: Bitstream Decompression for High Speed FPGA Configuration from Slow Memories. FPT 2007: 161-168 |
| 1 | Volker Breuer | |
| 2 | Christopher Dennl | |
| 3 | Michael Feilen | |
| 4 | Dirk Koch | |
| 5 | Walter Stechele | |
| 6 | Jürgen Teich | |
| 7 | Jim Torresen (Jim Tørresen) | |
| 8 | Daniel Ziener |
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