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 | 2012 | |
|---|---|---|
| j20 |      | Alessandro Savino, Stefano Di Carlo, Gianfranco Politano, Alfredo Benso, Alberto Bosio, Giorgio Di Natale: Statistical Reliability Estimation of Microprocessor-Based Systems. IEEE Trans. Computers 61(11): 1521-1534 (2012) |
| c48 | | Hafeez Ur Rehman, Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Alessandro Savino, Prashanth Suravajhala: Combining homolog and motif similarity data with Gene Ontology relationships for protein function prediction. BIBM 2012: 1-4 |
| 2011 | ||
| j19 | | Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Alessandro Savino, Hafeez Hafeezurrehman: Building gene expression profile classifiers with a simple and efficient rejection option in R. BMC Bioinformatics 12(S-13): S3 (2011) |
| j18 | | Alfredo Benso, Yiorgos Makris, Pinaki Mazumder: Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers 60(4): 450-451 (2011) |
| j17 | | Alfredo Benso, Stefano Di Carlo, Gianfranco Politano: A cDNA Microarray Gene Expression Data Classifier for Clinical Diagnostics Based on Graph Theory. IEEE/ACM Trans. Comput. Biology Bioinform. 8(3): 577-591 (2011) |
| 2009 | ||
| j16 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Paolo Prinetto: Are IEEE-1500-Compliant Cores Really Compliant to the Standard?. IEEE Design & Test of Computers 26(3): 16-24 (2009) |
| 2008 | ||
| j15 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: March Test Generation Revealed. IEEE Trans. Computers 57(12): 1704-1713 (2008) |
| j14 | | Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian: IEEE Standard 1500 Compliance Verification for Embedded Cores. IEEE Trans. VLSI Syst. 16(4): 397-407 (2008) |
| c47 | | Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Luca Sterpone: Differential gene expression graphs: A data structure for classification in DNA microarrays. BIBE 2008: 1-6 |
| c46 | | Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Luca Sterpone: A graph-based representation of Gene Expression profiles in DNA microarrays. CIBCB 2008: 75-82 |
| 2007 | ||
| c45 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Riccardo Mariani: A Functional Verification Based Fault Injection Environment. DFT 2007: 114-122 |
| c44 | | Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Alberto Bosio: Automating the IEEE std.1500 compliance verification for embedded cores. HLDVT 2007: 171-178 |
| c43 | | Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale: Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IOLTS 2007: 205-206 |
| 2006 | ||
| c42 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Automatic march tests generations for static linked faults in SRAMs. DATE 2006: 1258-1263 |
| c41 |  | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. DDECS 2006: 157-158 |
| c40 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Automatic March Tests Generation for Multi-Port SRAMs. DELTA 2006: 385-392 |
| c39 | | Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto: Single-Event Upset Analysis and Protection in High Speed Circuits. European Test Symposium 2006: 29-34 |
| c38 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A 22n March Test for Realistic Static Linked Faults in SRAMs. European Test Symposium 2006: 49-54 |
| 2005 | ||
| j13 | | Andrea Baldini, Alfredo Benso, Paolo Prinetto: A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems. Electr. Notes Theor. Comput. Sci. 116: 47-57 (2005) |
| j12 | | Liviu Miclea, Szilárd Enyedi, Paolo Prinetto, Alfredo Benso: Agent-based test and repair of distributed systems. J. Embedded Computing 1(3): 405-414 (2005) |
| j11 | | Andrea Baldini, Alfredo Benso, Paolo Prinetto: System-level functional testing from UML specifications in end-of-production industrial environments. STTT 7(4): 326-340 (2005) |
| c37 | | Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: March AB, March AB1: new March tests for unlinked dynamic memory faults. ITC 2005: 8 |
| c36 | | Alfredo Benso, Alessandro Cilardo, Nicola Mazzocca, Liviu Miclea, Paolo Prinetto, Szilárd Enyedi: Reconfigurable systems self-healing using mobile hardware agents. ITC 2005: 9 |
| 2004 | ||
| j10 | | Paolo Prinetto, Alfredo Benso: Test Technology TC Newsletter. IEEE Design & Test of Computers 21(2): 164-165 (2004) |
| c35 | | Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto: Towards Microagent based DBIST/DBISR. ITC 2004: 867-874 |
| 2003 | ||
| j9 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Online Self-Repair of FIR Filters. IEEE Design & Test of Computers 20(3): 50-57 (2003) |
| j8 | | Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian: A Hierarchical Infrastructure for SoC Test Management. IEEE Design & Test of Computers 20(4): 32-39 (2003) |
| c34 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A Watchdog Processor to Detect Data and Control Flow Errors. IOLTS 2003: 144-148 |
| c33 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, I. Solcia, Luca Tagliaferri: FAUST: FAUlt-injection Script-based Tool. IOLTS 2003: 160 |
| c32 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri: Data Critically Estimation In Software Applications. ITC 2003: 802-810 |
| c31 | | Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto: Agent Based DBIST/DBISR And Its Web/Wireless Management. ITC 2003: 952-960 |
| c30 | | |
| 2002 | ||
| j7 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto: DFT and BIST of a Multichip Module for High-Energy Physics Experiments. IEEE Design & Test of Computers 19(3): 94-105 (2002) |
| j6 | | Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto: An on-line BIST RAM architecture with self-repair capabilities. IEEE Transactions on Reliability 51(1): 123-128 (2002) |
| c29 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Specification and Design of a New Memory Fault Simulator. Asian Test Symposium 2002: 92-97 |
| c28 | | Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei: Beyond UML to an End-of-Line Functional Test Engine. DATE 2002: 499-503 |
| c27 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: An Optimal Algorithm for the Automatic Generation of March Tests. DATE 2002: 938-943 |
| c26 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Static Analysis of SEU Effects on Software Applications. ITC 2002: 500-508 |
| c25 | | Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei: Efficient Design of System Test: A Layered Architecture. ITC 2002: 930-939 |
| c24 | | Liviu Miclea, Szilárd Enyedi, Alfredo Benso: Itelligent Agents and BIST/BISR - Working Together in Distributed Systems. ITC 2002: 940-946 |
| 2001 | ||
| j5 | | Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: Online and Offline BIST in IP-Core Design. IEEE Design & Test of Computers 18(5): 92-99 (2001) |
| j4 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto: A Self-Repairing Execution Unit for Microprogrammed Processors. IEEE Micro 21(5): 16-22 (2001) |
| c23 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Memory Read Faults: Taxonomy and Automatic Test Generation. Asian Test Symposium 2001: 157-163 |
| c22 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri: Control-Flow Checking via Regular Expressions. Asian Test Symposium 2001: 299-303 |
| c21 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: SEU effect analysis in an open-source router via a distributed fault injection environment. DATE 2001: 219-225 |
| c20 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto: Validation of a Software Dependability Tool via Fault Injection Experiments. IOLTW 2001: 3-8 |
| c19 | | Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei: Towards a unified test process: from UML to end-of-line functional test. ITC 2001: 600-608 |
| 2000 | ||
| j3 | | Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian: A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures. J. Electronic Testing 16(3): 179-184 (2000) |
| c18 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto, P. Simonotti, G. Ugo: Self-Repairing in a Micro-Programmed Processor for Dependable Applications. DFT 2000: 231-239 |
| c17 | | Andrea Baldini, Alfredo Benso, Silvia Chiusano, Paolo Prinetto: 'BOND': An Interposition Agents Based Fault Injector for Windows NT. DFT 2000: 387-395 |
| c16 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Luca Tagliaferri: A C/C++ Source-to-Source Compiler for Dependable Applications. DSN 2000: 71-78 |
| c15 | | Alfredo Benso, Stefano Martinetto, Paolo Prinetto, Riccardo Mariani: An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications. ICCD 2000: 537-538 |
| c14 | | Alfredo Benso, Stefano Di Carlo, Silvia Chiusano, Paolo Prinetto, Fabio Ricciato, Monica Lobetti Bodoni, Maurizio Spadari: On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs. ICCD 2000: 539-540 |
| c13 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto: A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT. IOLTW 2000: 9-16 |
| c12 | | Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: A Family of Self-Repair SRAM Cores. IOLTW 2000: 214-218 |
| c11 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto: A software development kit for dependable applications in embedded systems. ITC 2000: 170-178 |
| c10 | | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: A programmable BIST architecture for clusters of multiple-port SRAMs. ITC 2000: 557-566 |
| c9 | | Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Fabio Ricciato, Maurizio Spadari, Yervant Zorian: HD/sup 2/BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs. ITC 2000: 892-901 |
| 1999 | ||
| j2 | | Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda: Fault Injection for Embedded Microprocessor-based Systems. J. UCS 5(10): 693-711 (1999) |
| c8 | | Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Simone Giovannetti, Riccardo Mariani, Silvano Motto: Testing an MCM for high-energy physics experiments: a case study. ITC 1999: 38-46 |
| c7 | | Monica Lobetti Bodoni, Alessio Pricco, Alfredo Benso, Silvia Chiusano, Paolo Prinetto: An on-line BISTed SRAM IP core. ITC 1999: 993-1000 |
| c6 | | Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian: HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs. ITC 1999: 1038-1044 |
| c5 | | Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda: FlexFi: A Flexible Fault Injection Environment for Microprocessor-Based Systems. SAFECOMP 1999: 323-335 |
| 1998 | ||
| j1 | | Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda: EXFI: a low-cost fault injection system for embedded microprocessor-based boards. ACM Trans. Design Autom. Electr. Syst. 3(4): 626-634 (1998) |
| c4 | | Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda, Pierluigi Civera: An Integrated HW and SW Fault Injection Environment for Real-Time Systems. DFT 1998: 117- |
| c3 | | Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda: A fault injection environment for microprocessor-based boards. ITC 1998: 768-773 |
| 1997 | ||
| c2 | | Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Raimund Ubar: A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs. ED&TC 1997: 560-565 |
| c1 | | Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Jaan Raik, Raimund Ubar: Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments. DFT 1997: 212-217 |
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