Hans Kristian Otnes Berge Coauthor index pubzone.org

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DBLP keys2013
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Sven Lütkemeier, Thorsten Jungeblut, Hans Kristian Otnes Berge, Snorre Aunet, Mario Porrmann, Ulrich Rückert: A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. J. Solid-State Circuits 48(1): 8-19 (2013)
2011
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet: Muller C-elements based on minority-3 functions for ultra low voltage supplies. DDECS 2011: 195-200
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hans Kristian Otnes Berge, Snorre Aunet: Multi-objective optimization of minority-3 functions for ultra-low voltage supplies. ISCAS 2011: 2313-2316
2010
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hans Kristian Otnes Berge, Matthias W. Blesken, Snorre Aunet, Ulrich Rückert: Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach. ICECS 2010: 319-322
2009
r1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Snorre Aunet, Hans Kristian Otnes Berge: Statistical Simulations on Perceptron-Based Adders. Encyclopedia of Artificial Intelligence 2009: 1474-1481
2008
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hans Kristian Otnes Berge, Philipp Häfliger: A Gate Leakage Feedback Element in an Adaptive Amplifier Application. IEEE Trans. on Circuits and Systems 55-II(2): 101-105 (2008)
2007
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Hans Kristian Otnes Berge, Philipp Häfliger: High-Speed Serial AER on FPGA. ISCAS 2007: 857-860
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Snorre Aunet, Hans Kristian Otnes Berge: Statistical Simulations for Exploring Defect Tolerance and Power Consumption for 4 Subthreshold 1-Bit Addition Circuits. IWANN 2007: 455-462

Coauthor Index

1Snorre Aunet
[j2] [c5] [c4] [c3] [r1] [c1]
2Matthias W. Blesken
[c3]
3Amir Hasanbegovic
[c5]
4Philipp Häfliger
[j1] [c2]
5Thorsten Jungeblut
[j2]
6Sven Lütkemeier
[j2]
7Mario Porrmann
[j2]
8Ulrich Rückert
[j2] [c3]
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