Guido Marco Bertoni
List of publications from the DBLP Bibliography Server - FAQ| 2013 | ||
|---|---|---|
| c33 | ||
| i7 | Guido Bertoni, Joan Daemen, Nicolas Debande, Thanh-Ha Le, Michael Peeters, Gilles Van Assche: Power Analysis of Hardware Implementations Protected with Secret Sharing. IACR Cryptology ePrint Archive 2013: 67 (2013) | |
| i6 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: Sakura: a flexible coding for tree hashing. IACR Cryptology ePrint Archive 2013: 231 (2013) | |
| 2012 | ||
| e1 | Guido Bertoni, Benedikt Gierlichs (Eds.): 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, Leuven, Belgium, September 9, 2012. IEEE 2012, isbn 978-1-4673-2900-2 | |
| 2011 | ||
| c32 | Alessandro Barenghi, Guido Bertoni, Fabrizio De Santis, Filippo Melzani: On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks. DSD 2011: 777-785 | |
| c31 | Alessandro Barenghi, Guido Bertoni, Andrea Palomba, Ruggero Susella: A novel fault attack against ECDSA. HOST 2011: 161-166 | |
| c30 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: Duplexing the Sponge: Single-Pass Authenticated Encryption and Other Applications. Selected Areas in Cryptography 2011: 320-337 | |
| c29 | Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Andrea Palomba: Fault attack to the elliptic curve digital signature algorithm with multiple bit faults. SIN 2011: 63-72 | |
| i5 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: Duplexing the sponge: single-pass authenticated encryption and other applications. IACR Cryptology ePrint Archive 2011: 499 (2011) | |
| 2010 | ||
| c28 | Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Fault attack on AES with single-bit induced faults. IAS 2010: 167-172 | |
| c27 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: Sponge-Based Pseudo-Random Number Generators. CHES 2010: 33-47 | |
| c26 | Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Low Voltage Fault Attacks to AES. HOST 2010: 7-12 | |
| i4 | Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Low Voltage Fault Attacks to AES and RSA on General Purpose Processors. IACR Cryptology ePrint Archive 2010: 130 (2010) | |
| 2009 | ||
| c25 | Alessandro Barenghi, Guido Bertoni, Emanuele Parrinello, Gerardo Pelosi: Low Voltage Fault Attacks on the RSA Cryptosystem. FDTC 2009: 23-31 | |
| c24 | Guido Marco Bertoni, Luca Breveglieri, Alessandro Cominola, Filippo Melzani, Ruggero Susella: Practical Power Analysis Attacks to RSA on a Large IP Portfolio SoC. ITNG 2009: 455-460 | |
| i3 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: Sufficient conditions for sound tree and sequential hashing modes. IACR Cryptology ePrint Archive 2009: 210 (2009) | |
| 2008 | ||
| j4 | Guido Marco Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi: Parallel Hardware Architectures for the Cryptographic Tate Pairing. I. J. Network Security 7(1): 31-37 (2008) | |
| j3 | Guido Bertoni, Luca Breveglieri, Liqun Chen, Pasqualina Fragneto, Keith A. Harrison, Gerardo Pelosi: A pairing SW implementation for Smart-Cards. Journal of Systems and Software 81(7): 1240-1247 (2008) | |
| j2 | Sylvain Guilley, Laurent Sauvage, Philippe Hoogvorst, Renaud Pacalet, Guido Marco Bertoni, Sumanta Chaudhuri: Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks. IEEE Trans. Computers 57(11): 1482-1497 (2008) | |
| c23 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: On the Indifferentiability of the Sponge Construction. EUROCRYPT 2008: 181-197 | |
| c22 | Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi: A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. ITNG 2008: 112-119 | |
| c21 | Guido Marco Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni: A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. SECRYPT 2008: 453-459 | |
| 2006 | ||
| c20 | Guido Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni: Speeding Up AES By Extending a 32 bit Processor Instruction Set. ASAP 2006: 275-282 | |
| c19 | Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, L. Sportiello: Software implementation of Tate pairing over GF(2m). DATE Designers' Forum 2006: 7-11 | |
| c18 | Thomas J. Wollinger, Guido Bertoni, Luca Breveglieri, Christof Paar: Performance of HECC Coprocessors Using Inversion-Free Formulae. ICCSA (3) 2006: 1004-1012 | |
| c17 | Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi: Parallel Hardware Architectures for the Cryptographic Tate Pairing. ITNG 2006: 186-191 | |
| c16 | Guido Bertoni, Luca Breveglieri, Matteo Venturi: ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. ITNG 2006: 573-574 | |
| c15 | Guido Bertoni, Luca Breveglieri, Matteo Venturi: Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. PerCom Workshops 2006: 337-341 | |
| i2 | Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: RadioGatún, a belt-and-mill hash function. IACR Cryptology ePrint Archive 2006: 369 (2006) | |
| 2005 | ||
| c14 | Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo: AES Power Attack Based on Induced Cache Miss and Countermeasure. ITCC (1) 2005: 586-591 | |
| c13 | Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luca Breveglieri: A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. ITCC (1) 2005: 626-630 | |
| 2004 | ||
| c12 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri: An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. DFT 2004: 130-138 | |
| c11 | Guido Bertoni, Marco Macchetti, Luca Negri, Pasqualina Fragneto: Power-efficient ASIC synthesis of cryptographic sboxes. ACM Great Lakes Symposium on VLSI 2004: 277-281 | |
| c10 | Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar: Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. ITCC (2) 2004: 538- | |
| i1 | Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar: Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. IACR Cryptology ePrint Archive 2004: 29 (2004) | |
| 2003 | ||
| j1 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans. Computers 52(4): 492-505 (2003) | |
| c9 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. ASAP 2003: 423-432 | |
| c8 | Guido Bertoni, Jorge Guajardo, Sandeep S. Kumar, Gerardo Orlando, Christof Paar, Thomas J. Wollinger: Efficient GF(pm) Arithmetic Architectures for Cryptographic Applications. CT-RSA 2003: 158-175 | |
| c7 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. DFT 2003: 105- | |
| c6 | Guido Bertoni, Jorge Guajardo, Gerardo Orlando: Systolic and Scalable Architectures for Digit-Serial Multiplication in Fields GF(pm). INDOCRYPT 2003: 349-362 | |
| c5 | Guido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria: About the performances of the Advanced Encryption Standard in embedded systems with cache memory. ISCAS (5) 2003: 145-148 | |
| 2002 | ||
| c4 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP 2002: 303- | |
| c3 | Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin: Efficient Software Implementation of AES on 32-Bit Platforms. CHES 2002: 159-171 | |
| c2 | Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. DFT 2002: 51-59 | |
| 2001 | ||
| c1 | Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto: Efficient finite field digital-serial multiplier architecture for cryptography applications. DATE 2001: 812 | |
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