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 | 2013 | |
|---|---|---|
| c46 |      | Alberto Ghiribaldi, Davide Bertozzi, Steven M. Nowick: A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems. DATE 2013: 332-337 |
| c45 | | Luca Ramini, Paolo Grani, Sandro Bartolini, Davide Bertozzi: Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis. DATE 2013: 1589-1594 |
| 2012 | ||
| j18 | | Milos Krstic, Xin Fan, Eckhard Grass, Luca Benini, Mohammad Reza Kakoee, Christoph Heer, Birgit Sanders, Alessandro Strano, Davide Bertozzi: Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience. IJERTCS 3(4): 1-18 (2012) |
| c44 | | Vladimir Todorov, Alberto Ghiribaldi, Helmut Reinig, Davide Bertozzi, Ulf Schlichtmann: Non-intrusive trace & debug noc architecture with accurate timestamping for GALS SoCs. CODES+ISSS 2012: 181-186 |
| c43 | | José L. Abellán, Juan Fernández Peinador, Manuel E. Acacio, Davide Bertozzi, Daniele Bortolotti, Andrea Marongiu, Luca Benini: Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs. DATE 2012: 491-496 |
| c42 | | Samuel Rodrigo, Frank Olaf Sem-Jacobsen, Hervé Tatenguem, Tor Skeie, Davide Bertozzi: Cost-Effective Contention Avoidance in a CMP with Shared Memory Controllers. Euro-Par 2012: 741-752 |
| c41 | | Alberto Ghiribaldi, Alessandro Strano, Michele Favalli, Davide Bertozzi: Power efficiency of switch architecture extensions for fault tolerant NoC design. IGCC 2012: 1-6 |
| c40 | | Davide Bertozzi, Luca Benini: A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip. ICCD 2012: 43-44 |
| c39 | | Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini: Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs. ICCD 2012: 45-48 |
| c38 | | Alessandro Strano, Davide Bertozzi, Francisco Triviño, José L. Sánchez, Francisco J. Alfaro, Jose Flich: OSR-Lite: Fast and deadlock-free NoC reconfiguration framework. ICSAMOS 2012: 86-95 |
| 2011 | ||
| j17 | | Giacomo Paci, Davide Bertozzi, Luca Benini: Variability compensation for full-swing against low-swing on-chip communication. IET Computers & Digital Techniques 5(5): 355-365 (2011) |
| j16 | | Alessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi: Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design. IJERTCS 2(4): 1-20 (2011) |
| j15 | | Samuel Rodrigo, José Flich, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesus Camacho, Federico Silla, José Duato: Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Trans. on CAD of Integrated Circuits and Systems 30(4): 534-547 (2011) |
| c37 | | Alessandro Strano, Davide Bertozzi, Arnaud Grasset, Sami Yehia: Exploiting structural redundancy of SIMD accelerators for their built-in self-testing/diagnosis and reconfiguration. ASAP 2011: 141-148 |
| c36 | | Alessandro Strano, Crispín Gómez Requena, Daniele Ludovici, Michele Favalli, María Engracia Gómez, Davide Bertozzi: Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture. DATE 2011: 661-666 |
| c35 | | Alberto Ghiribaldi, Daniele Ludovici, Michele Favalli, Davide Bertozzi: System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic. VLSI-SoC 2011: 308-313 |
| 2010 | ||
| c34 | | Daniele Ludovici, Alessandro Strano, Georgi Nedeltchev Gaydadjiev, Luca Benini, Davide Bertozzi: Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs. DATE 2010: 679-684 |
| c33 | | Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesus Camacho, Federico Silla, José Duato: Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing. NOCS 2010: 25-32 |
| c32 | | Francisco Gilabert Villamón, María Engracia Gómez, Simone Medardoni, Davide Bertozzi: Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip. NOCS 2010: 165-172 |
| c31 | | Alessandro Strano, Daniele Ludovici, Davide Bertozzi: A library of dual-clock FIFOs for cost-effective and flexible MPSoC design. ICSAMOS 2010: 20-27 |
| 2009 | ||
| j14 | | Davide Bertozzi, Kees Goossens: Networks on chips [editorial]. IET Computers & Digital Techniques 3(5): 395-397 (2009) |
| j13 | | Samuel Rodrigo, Simone Medardoni, José Flich, Davide Bertozzi, José Duato: Efficient implementation of distributed routing algorithms for NoCs. IET Computers & Digital Techniques 3(5): 460-475 (2009) |
| j12 | | Martino Ruggiero, Davide Bertozzi, Luca Benini, Michela Milano, A. Andrei: Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 378-391 (2009) |
| p3 | | José L. Ayala, Marisa López-Vallejo, Davide Bertozzi, Luca Benini: SoC Communication Architectures: From Interconnection Buses to Packet-Switched NoCs. Embedded Systems Design and Verification 2009: 14 |
| p2 | | Francisco Gilabert Villamón, Davide Bertozzi, Luca Benini, Giovanni De Micheli: Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip. Embedded Systems Design and Verification 2009: 15 |
| c30 | | Francisco Gilabert Villamón, Daniele Ludovici, Simone Medardoni, Davide Bertozzi, Luca Benini, Georgi Nedeltchev Gaydadjiev: Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints. CISIS 2009: 681-687 |
| c29 | | Daniele Ludovici, Francisco Gilabert Villamón, Simone Medardoni, Crispín Gómez Requena, María Engracia Gómez, Pedro López, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi: Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints. DATE 2009: 562-565 |
| c28 | | Giacomo Paci, Davide Bertozzi, Luca Benini: Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels. DATE 2009: 1404-1409 |
| c27 | | Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi, Luca Benini: Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip. ACM Great Lakes Symposium on VLSI 2009: 125-128 |
| c26 | | Daniele Ludovici, Alessandro Strano, Davide Bertozzi, Luca Benini, Georgi Gaydadjiev: Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture. NOCS 2009: 244-249 |
| 2008 | ||
| j11 | | Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Michela Milano, Luca Benini: A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness. International Journal of Parallel Programming 36(1): 3-36 (2008) |
| j10 | | Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration. ACM Trans. Design Autom. Electr. Syst. 13(2) (2008) |
| c25 | | Bonesi Stefano, Davide Bertozzi, Luca Benini, Enrico Macii: Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style. DATE 2008: 967-972 |
| c24 | | Simone Medardoni, Marcello Lajolo, Davide Bertozzi: Variation tolerant NoC design by means of self-calibrating links. DATE 2008: 1402-1407 |
| c23 | | Alberto Ferrante, Simone Medardoni, Davide Bertozzi: Network Interface Sharing Techniques for Area Optimized NoC Architectures. DSD 2008: 10-17 |
| c22 | | Luca Benini, Davide Bertozzi, Michela Milano: Resource Management Policy Handling Multiple Use-Cases in MPSoC Platforms Using Constraint Programming. ICLP 2008: 470-484 |
| c21 | | Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López, José Duato: Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework. NOCS 2008: 107-116 |
| 2007 | ||
| j9 | | Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino: Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. IEEE Trans. Computers 56(5): 606-621 (2007) |
| j8 | | Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology. T. HiPEAC 1: 239-258 (2007) |
| j7 | | Davide Bertozzi, Shashi Kumar, Maurizio Palesi: Networks-on-Chip: Emerging Research Topics and Novel Ideas. VLSI Design 2007 (2007) |
| c20 | | Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luca Benini: Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions. CODES+ISSS 2007: 217-226 |
| c19 | | Simone Medardoni, Martino Ruggiero, Davide Bertozzi, Luca Benini, Giovanni Strano, Carlo Pistritto: Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms. DATE 2007: 660-665 |
| c18 | | Simone Medardoni, Davide Bertozzi, Enrico Macii: Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies. ISLPED 2007: 159-164 |
| 2006 | ||
| c17 | | Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis. Conf. Computing Frontiers 2006: 21-28 |
| c16 | | Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano: Allocation, Scheduling and Voltage Scaling on Energy Aware MPSoCs. CPAIOR 2006: 44-58 |
| c15 | | Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration. DAC 2006: 125-130 |
| c14 | | Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Francesco Poletti, Michela Milano: Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip. DATE 2006: 3-8 |
| c13 | | Stefano Bertozzi, Andrea Acquaviva, Davide Bertozzi, Antonio Poggiali: Supporting task migration in multi-processor systems-on-chip: a feasibility study. DATE 2006: 15-20 |
| 2005 | ||
| j6 |  | Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano, Francesco Poletti: Measuring Efficiency and Executability of Allocation and Scheduling in Multi-Processor Systems-on-Chip. Intelligenza Artificiale 2(3): 13-20 (2005) |
| j5 | | Davide Bertozzi, Luca Benini, Giovanni De Micheli: Error control schemes for on-chip communication links: the energy-reliability tradeoff. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 818-831 (2005) |
| j4 | | Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli: NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. IEEE Trans. Parallel Distrib. Syst. 16(2): 113-129 (2005) |
| j3 | | Luca Benini, Davide Bertozzi, Alessandro Bogliolo, Francesco Menichelli, Mauro Olivieri: MPARM: Exploring the Multi-Processor SoC Design Space with SystemC. VLSI Signal Processing 41(2): 169-182 (2005) |
| p1 | | Davide Bertozzi, Luca Benini, Giovanni De Micheli: Network On-Chip Design for Gigascale Systems-on-Chip. The Industrial Information Technology Handbook 2005: 0- |
| c12 | | Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano: Allocation and Scheduling for MPSoCs via Decomposition and No-Good Generation. CP 2005: 107-121 |
| c11 | | Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli: ast pipes Lite: A Synthesis Oriented Design Library For Networks on Chips. DATE 2005: 1188-1193 |
| c10 | | Martino Ruggiero, Andrea Acquaviva, Davide Bertozzi, Luca Benini: Application-Specific Power-Aware Workload Allocation for Voltage Scalable MPSoC Platforms. ICCD 2005: 87-93 |
| c9 | | Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano: Allocation and Scheduling for MPSoCs via decomposition and no-good generation. IJCAI 2005: 1517-1518 |
| c8 | | Antonio Pullini, Federico Angiolini, Davide Bertozzi, Luca Benini: Fault tolerance overhead in network-on-chip flow control schemes. SBCCI 2005: 224-229 |
| 2004 | ||
| c7 | | Mirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon: Analyzing On-Chip Communication in a MPSoC Environment. DATE 2004: 752-757 |
| 2003 | ||
| j2 | | Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino: SystemC Cosimulation and Emulation of Multiprocessor SoC Designs. IEEE Computer 36(4): 53-59 (2003) |
| j1 | | Francesco Poletti, Davide Bertozzi, Luca Benini, Alessandro Bogliolo: Performance Analysis of Arbitration Policies for SoC Communication Architectures. Design Autom. for Emb. Sys. 8(2-3): 189-210 (2003) |
| c6 | | Davide Bertozzi, Anand Raghunathan, Luca Benini, Srivaths Ravi: Transport Protocol Optimization for Energy Efficient Wireless Embedded Systems. DATE 2003: 10706-10713 |
| c5 | | Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini: xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs. ICCD 2003: 536- |
| 2002 | ||
| c4 | | Davide Bertozzi, Luca Benini, Giovanni De Micheli: Low Power Error Resilient Encoding for On-Chip Data Buses. DATE 2002: 102-109 |
| c3 | | Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino: Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip. ICCD 2002: 494-499 |
| c2 | | Davide Bertozzi, Luca Benini, Bruno Riccò: Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding. ISCAS (1) 2002: 93-96 |
| c1 | | Davide Bertozzi, Luca Benini, Bruno Riccò: Parametric timing and power macromodels for high level simulation of low-swing interconnects. ISLPED 2002: 307-312 |
Colors in the list of coauthors
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