- CSB - MetaPress - Google - Bing - Yahoo
 | 2009 | |
|---|---|---|
| j23 |      | Sebastien Horna, Daniel Meneveaux, Guillaume Damiand, Yves Bertrand: Consistency constraints and 3D building reconstruction. Computer-Aided Design 41(1): 13-27 (2009) |
| j22 | | Beatrice Pradarelli, Laurent Latorre, Marie-Lise Flottes, Yves Bertrand, Pascal Nouet: Remote Labs for Industrial IC Testing. TLT 2(4): 304-311 (2009) |
| c48 | | Florence Azaïs, Yves Bertrand, Michel Renovell: An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions. DDECS 2009: 158-163 |
| 2008 | ||
| c47 | | Fabien Soulier, Lionel Gouyet, Guy Cathébras, Serge Bernard, David Guiraud, Yves Bertrand: Multipolar Electrode and Preamplifier Design for ENG-Signal Acquisition. BIOSTEC (Selected Papers) 2008: 148-159 |
| c46 |  | Fabien Soulier, Lionel Gouyet, Guy Cathébras, Serge Bernard, David Guiraud, Yves Bertrand: Considerations on Improving the Design of CUFF Electrode for ENG Recording - Geometrical Approach, Dedicated IC, Sensitivity, Noise Rejection. BIODEVICES (2) 2008: 180-185 |
| c45 | | Florence Azaïs, Laurent Larguier, Yves Bertrand, Michel Renovell: On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring. IOLTS 2008: 233-238 |
| 2007 | ||
| c44 | | Mehdi Baba-ali, David Marcheix, Xavier Skapin, Yves Bertrand: Generic computation of bulletin boards into geometric kernels. Afrigraph 2007: 85-93 |
| c43 | | Sebastien Horna, Guillaume Damiand, Daniel Meneveaux, Yves Bertrand: Building 3D indoor scenes topology from 2D architectural plans. GRAPP (GM/R) 2007: 37-44 |
| 2005 | ||
| j21 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell: Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications. J. Electronic Testing 21(3): 291-298 (2005) |
| j20 | | Jean Marc Gallière, Michel Renovell, Florence Azaïs, Yves Bertrand: Delay Testing Viability of Gate Oxide Short Defects. J. Comput. Sci. Technol. 20(2): 195-200 (2005) |
| j19 | | Sylvain Prat, Patrick Gioia, Yves Bertrand, Daniel Meneveaux: Connectivity compression in an arbitrary dimension. The Visual Computer 21(8-10): 876-885 (2005) |
| 2004 | ||
| j18 | | Guillaume Damiand, Yves Bertrand, Christophe Fiorio: Topological model for two-dimensional image representation: definition and optimal extraction algorithm. Computer Vision and Image Understanding 93(2): 111-154 (2004) |
| j17 | | Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell: Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors. J. Electronic Testing 20(3): 257-267 (2004) |
| j16 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell: Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure. J. Electronic Testing 20(4): 375-387 (2004) |
| c42 | | Marie-Lise Flottes, Yves Bertrand, L. Balado, Emili Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich: Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. DELTA 2004: 135-139 |
| 2003 | ||
| j15 | | Florence Azaïs, Yves Bertrand, Michel Renovell, André Ivanov, Sassan Tabatabaei: An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs. IEEE Design & Test of Computers 20(1): 60-67 (2003) |
| j14 | | Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand: Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short. J. Electronic Testing 19(4): 377-386 (2003) |
| j13 | | Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell: On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST. J. Electronic Testing 19(4): 469-479 (2003) |
| j12 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell: A-to-D converters static error detection from dynamic parameter measurement. Microelectronics Journal 34(10): 945-953 (2003) |
| c41 | | Michel Renovell, Jean Marc Gallière, Florence Azaïs, Yves Bertrand: Delay Testing of MOS Transistor with Gate Oxide Short. Asian Test Symposium 2003: 168-173 |
| c40 | | Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell: A New Methodology For ADC Test Flow Optimization. ITC 2003: 201-209 |
| c39 | | Yves Bertrand, Marie-Lise Flottes, L. Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich, J.-P. Van der Heyden: Test Engineering Education in Europe: the EuNICE-Test Project. MSE 2003: 85-86 |
| 2002 | ||
| j11 | | Michel Renovell, Florence Azaïs, Yves Bertrand: Improving Defect Detection in Static-Voltage Testing. IEEE Design & Test of Computers 19(6): 83-89 (2002) |
| j10 | | Franck Ledoux, Jean-Marc Mota, Agnès Arnould, Catherine Dubois, Pascale Le Gall, Yves Bertrand: Spécifications formelles du chanfreinage. Technique et Science Informatiques 21(8): 1073-1098 (2002) |
| c38 | | Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet: On the Use of an Oscillation-Based Test Methodology for CMOS Micro-Electro-Mechanical Systems. DATE 2002: 1120 |
| c37 | | Yves Bertrand, Marie-Lise Flottes, Florence Azaïs, Serge Bernard, Laurent Latorre, Regis Lorival: European Network for Test Education. DELTA 2002: 230-234 |
| c36 | | Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet: Evaluation of the Oscillation-based Test Methodology for Micro-Electro-Mechanical Systems. VTS 2002: 439-444 |
| 2001 | ||
| j9 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell: A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs. J. Electronic Testing 17(2): 139-147 (2001) |
| j8 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell: Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST. J. Electronic Testing 17(3-4): 255-266 (2001) |
| j7 | | Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet: Test and Testability of a Monolithic MEMS for Magnetic Field Sensing. J. Electronic Testing 17(5): 439-450 (2001) |
| j6 | | André Ivanov, Sumbal Rafiq, Michel Renovell, Florence Azaïs, Yves Bertrand: On the detectability of CMOS floating gate transistor faults. IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 116-128 (2001) |
| c35 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell: Implementation of a linear histogram BIST for ADCs. DATE 2001: 590-595 |
| c34 | | Serge Bernard, Florence Azaïs, Yves Bertrand, Michel Renovell: Analog BIST Generator for ADC Testing. DFT 2001: 338-346 |
| c33 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell: On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST. VLSI-SOC 2001: 425-436 |
| c32 | | Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet: Noise optimisation of a piezoresistive CMOS MEMS for magnetic field sensing. VLSI-SOC 2001: 461-472 |
| c31 | | Michel Renovell, Jean Marc Gallière, Florence Azaïs, Serge Bernard, Yves Bertrand: Boolean and current detection of MOS transistor with gate oxide short. ITC 2001: 1039-1048 |
| c30 | | Florence Azaïs, Serge Bernard, Yves Bertrand, Xavier Michel, Michel Renovell: A Low-Cost Adaptive Ramp Generator for Analog BIST Applications. VTS 2001: 266-271 |
| c29 | | Franck Ledoux, Agnès Arnould, Pascale Le Gall, Yves Bertrand: Geometric Modelling with CASL. WADT 2001: 176-200 |
| c28 | | Sylvain Thery, Dominique Bechmann, Yves Bertrand: N-Dimensional Gregory-Bezier for N-Dimensional Cellular Complexes. WSCG (Short Papers) 2001: 16-23 |
| 2000 | ||
| j5 | | Michel Renovell, Florence Azaïs, J-C. Bodin, Yves Bertrand: Combining Functional and Structural Approaches for Switched-Current Circuit Testing. J. Electronic Testing 16(3): 259-267 (2000) |
| j4 | | Sylvain Brandel, Dominique Bechmann, Yves Bertrand: Thickening: an operation for animation. Journal of Visualization and Computer Animation 11(5): 261-277 (2000) |
| j3 | | Jean Françon, Yves Bertrand: Topological 3D-manifolds: a statistical study of the cells. Theor. Comput. Sci. 234(1-2): 233-254 (2000) |
| c27 | | Luigi Carro, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs, Michel Renovell: TI-BIST: a temperature independent analog BIST for switched-capacitor filters. Asian Test Symposium 2000: 78-83 |
| c26 | | Érika F. Cota, Michel Renovell, Florence Azaïs, Yves Bertrand, Luigi Carro, Marcelo Lubaszewski: Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte. DATE 2000: 226-230 |
| c25 | | Yves Bertrand, Guillaume Damiand, Christophe Fiorio: Topological Encoding of 3D Segmented Images. DGCI 2000: 311-324 |
| c24 | | Michel Renovell, Florence Azaïs, Serge Bernard, Yves Bertrand: Hardware Resource Minimization for Histogram-Based ADC BIST. VTS 2000: 247-254 |
| 1999 | ||
| j2 | | Michel Renovell, Florence Azaïs, Yves Bertrand: Detection of Defects Using Fault Model Oriented Test Sequences. J. Electronic Testing 14(1-2): 13-22 (1999) |
| c23 | | Laurent Latorre, Yves Bertrand, P. Hazard, F. Pressecq, Pascal Nouet: Design, Characterization & Modelling of a CMOS Magnetic Field Sensor. DATE 1999: 239-243 |
| c22 | | Yves Bertrand, Christophe Fiorio, Yann Pennaneach: Border Map: A Topological Representation for nD Image Analysis. DGCI 1999: 242-257 |
| c21 | | Michel Renovell, André Ivanov, Yves Bertrand, Florence Azaïs, Sumbal Rafiq: Optimal conditions for Boolean and current detection of floating gate faults. ITC 1999: 477-486 |
| c20 | | Yves Bertrand, Florence Azaïs, Marie-Lise Flottes, Regis Lorival: A Successful Distance-Learning Experience for IC Test Education. MSE 1999: 20-21 |
| 1998 | ||
| c19 | | Michel Renovell, Florence Azaïs, J-C. Bodin, Yves Bertrand: BISTing Switched-Current Circuits. Asian Test Symposium 1998: 372-377 |
| c18 | | Florence Azaïs, André Ivanov, Michel Renovell, Yves Bertrand: A Methodology and Design for Effective Testing of Voltage-Controlled Oscillators (VCOs. Asian Test Symposium 1998: 383-387 |
| c17 | | Michel Renovell, Florence Azaïs, Yves Bertrand: Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits. DATE 1998: 815-821 |
| c16 | | Florence Azaïs, Michel Renovell, Yves Bertrand, J-C. Bodin: Design-For-Testability for Switched-Current Circuits. VTS 1998: 370-375 |
| 1997 | ||
| c15 | | A. Dargelas, C. Gauthron, Yves Bertrand: MOSAIC: a multiple-strategy oriented sequential ATPG for integrated circuits. ED&TC 1997: 29-36 |
| c14 | | Michel Renovell, Florence Azaïs, Yves Bertrand: On-chip analog output response compaction. ED&TC 1997: 568-572 |
| c13 | | |
| 1996 | ||
| c12 | | Michel Renovell, P. Huc, Yves Bertrand: The Logic Threshold Based Voting: A Model for Local Feedback Bridging Fault. EDCC 1996: 205-213 |
| c11 | | Michel Renovell, Florence Azaïs, Yves Bertrand: The multi-configuration: A DFT technique for analog circuits. VTS 1996: 54-59 |
| c10 | | Michel Renovell, P. Huc, Yves Bertrand: Bridging fault coverage improvement by power supply control. VTS 1996: 338-343 |
| 1995 | ||
| c9 | | Michel Renovell, P. Huc, Yves Bertrand: Serial transistor network modeling for bridging fault simulation. Asian Test Symposium 1995: 100-106 |
| c8 | | Michel Renovell, Florence Azaïs, Yves Bertrand: A design-for-test technique for multistage analog circuits. Asian Test Symposium 1995: 113-119 |
| c7 | | S. Lavabre, Yves Bertrand, Michel Renovell, Christian Landrault: Test configurations to enhance the testability of sequential circuits. Asian Test Symposium 1995: 160-168 |
| c6 | | Michel Renovell, P. Huc, Yves Bertrand: The concept of resistance interval: a new parametric model for realistic resistive bridging fault. VTS 1995: 184-189 |
| 1994 | ||
| j1 | | Yves Bertrand, Jean-François Dufourd: Algebraic Specification of a 3D-Modeler Based on Hypermaps. CVGIP: Graphical Model and Image Processing 56(1): 29-60 (1994) |
| c5 | | Michel Renovell, P. Huc, Yves Bertrand: The Configuration Ratio: A Model for Simulating CMOS Intra-Gate Bridge with Variable Logic Thresholds. EDCC 1994: 165-177 |
| c4 | | |
| 1993 | ||
| c3 | | Yves Bertrand, Frédéric Bancel, Michel Renovell: Multiconfiguration Technique to Reduce Test Duration for Sequential Circuits. ITC 1993: 989-997 |
| c2 | | Yves Bertrand, Jean-François Dufourd, Jean Françon, Pascal Lienhardt: Algebraic Specification and Development in Geometric Modeling. TAPSOFT 1993: 75-89 |
| c1 | | Yves Bertrand, Frédéric Bancel, Michel Renovell: A DFT Technique to Improve ATPG Efficiency for Sequential Circuits. VLSI Design 1993: 51-54 |
Colors in the list of coauthors
Last update Fri May 24 19:27:52 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page