| 2009 | ||
|---|---|---|
| c10 | ||
| 2003 | ||
| c9 | Dileep Bhandarkar: Billion Transistor Chips in Mainstream Enterprise Platforms of the Future. HPCA 2003: 3 | |
| 2002 | ||
| c8 | Dileep Bhandarkar: Parallelism in Mainstream Enterprise Platforms of the Future. IEEE PACT 2002: 3-4 | |
| 1998 | ||
| e1 | Dileep Bhandarkar, Anant Agarwal (Eds.): ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998. ACM Press 1998, isbn 1-58113-107-0 | |
| 1997 | ||
| c7 | Dileep Bhandarkar, Jianxun Jason Ding: Performance Characterization of the Pentium(r) Pro Processor. HPCA 1997: 288-299 | |
| 1996 | ||
| b1 | Dileep Bhandarkar: Alpha implementations and architecture - complete reference and guide. Digital Press 1996, isbn 978-1-55558-130-5, pp. I-XVIII, 1-328 | |
| c6 | Zarka Cvetanovic, Dileep Bhandarkar: Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads. HPCA 1996: 270-280 | |
| 1994 | ||
| c5 | Zarka Cvetanovic, Dileep Bhandarkar: Characterization of Alpha AXP Performance Using TP and SPEC Workloads. ISCA 1994: 60-70 | |
| 1991 | ||
| c4 | Dileep Bhandarkar, Douglas W. Clark: Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. ASPLOS 1991: 310-319 | |
| 1990 | ||
| c3 | ||
| 1987 | ||
| c2 | ||
| 1982 | ||
| j5 | Dileep Bhandarkar: Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers. IEEE Computer 15(2): 87-93 (1982) | |
| 1981 | ||
| j4 | Mahadev Satyanarayanan, Dileep Bhandarkar: Design Trade-Offs in VAX-11 Translation Buffer Organization. IEEE Computer 14(12): 103-111 (1981) | |
| 1977 | ||
| j3 | Dileep Bhandarkar: Some Performance Issues in Multiprocessor System Design. IEEE Trans. Computers 26(5): 506-511 (1977) | |
| 1975 | ||
| j2 | Dileep Bhandarkar: Analysis of Memory Interference in Multiprocessors. IEEE Trans. Computers 24(9): 897-908 (1975) | |
| j1 | Dileep Bhandarkar: On the Performance of Magnetic Bubble Memories in Computer Systems. IEEE Trans. Computers 24(11): 1125-1129 (1975) | |
| 1973 | ||
| c1 | Dileep Bhandarkar, Samuel H. Fuller: Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. ISCA 1973: 1-6 | |
| 1 | Anant Agarwal | |
| 2 | Richard Brunner | |
| 3 | Douglas W. Clark | |
| 4 | Zarka Cvetanovic | |
| 5 | Jianxun Jason Ding (Jianxun Ding) | |
| 6 | Samuel H. Fuller | |
| 7 | B. Kusik | |
| 8 | Don McInnis | |
| 9 | Mahadev Satyanarayanan (M. Satyanarayanan) |
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