Dileep Bhandarkar

Dileep Bhandarkar: Performance analysis in the real world of on line services. ISPASS 2009

Dileep Bhandarkar: Billion Transistor Chips in Mainstream Enterprise Platforms of the Future. HPCA 2003: 3

Dileep Bhandarkar: Parallelism in Mainstream Enterprise Platforms of the Future. IEEE PACT 2002: 3-4

Dileep Bhandarkar, Anant Agarwal (Eds.): ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998. ACM Press 1998, isbn 1-58113-107-0

Dileep Bhandarkar, Jianxun Jason Ding: Performance Characterization of the Pentium(r) Pro Processor. HPCA 1997: 288-299

Dileep Bhandarkar: Alpha implementations and architecture - complete reference and guide. Digital Press 1996, isbn 978-1-55558-130-5, pp. I-XVIII, 1-328

Zarka Cvetanovic, Dileep Bhandarkar: Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads. HPCA 1996: 270-280

Zarka Cvetanovic, Dileep Bhandarkar: Characterization of Alpha AXP Performance Using TP and SPEC Workloads. ISCA 1994: 60-70

Dileep Bhandarkar, Douglas W. Clark: Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. ASPLOS 1991: 310-319

Dileep Bhandarkar, Richard Brunner: VAX Vector Architecture. ISCA 1990: 204-215

Don McInnis, B. Kusik, Dileep Bhandarkar: VAX 8800 System Overview. COMPCON 1987: 316-321

Dileep Bhandarkar: Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers. IEEE Computer 15(2): 87-93 (1982)

Mahadev Satyanarayanan, Dileep Bhandarkar: Design Trade-Offs in VAX-11 Translation Buffer Organization. IEEE Computer 14(12): 103-111 (1981)

Dileep Bhandarkar: Some Performance Issues in Multiprocessor System Design. IEEE Trans. Computers 26(5): 506-511 (1977)

Dileep Bhandarkar: Analysis of Memory Interference in Multiprocessors. IEEE Trans. Computers 24(9): 897-908 (1975)

Dileep Bhandarkar: On the Performance of Magnetic Bubble Memories in Computer Systems. IEEE Trans. Computers 24(11): 1125-1129 (1975)

Dileep Bhandarkar, Samuel H. Fuller: Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. ISCA 1973: 1-6