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 | 2013 | |
|---|---|---|
| j61 |      | Dipak K. Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Derivation of test set for detecting multiple missing-gate faults in reversible circuits. Computers & Electrical Engineering 39(2): 225-236 (2013) |
| 2012 | ||
| j60 | | Yang Zhao, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Testing of Low-cost Digital Microfluidic Biochips with Non-Regular Array Layouts. J. Electronic Testing 28(2): 243-255 (2012) |
| j59 | | Arindam Biswas, Partha Bhowmick, Moumita Sarkar, Bhargab B. Bhattacharya: A linear-time combinatorial algorithm to find the orthogonal hull of an object on the digital plane. Inf. Sci. 216: 176-195 (2012) |
| j58 | | Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Congestion-aware layout design for high-throughput digital microfluidic biochips. JETC 8(3): 17 (2012) |
| c104 | | Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya: A New Look Ahead Technique for Customized Testing in Digital Microfluidic Biochips. Asian Test Symposium 2012: 25-30 |
| c103 | | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On-Line Error Detection in Digital Microfluidic Biochips. Asian Test Symposium 2012: 332-337 |
| c102 | | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Automated path planning for washing in digital microfluidic biochips. CASE 2012: 115-120 |
| c101 | | Sandip Banerjee, Bhargab B. Bhattacharya, Sandip Das, Arindam Karmakar, Anil Maheshwari, Sasanka Roy: On the Construction of a Generalized Voronoi Inverse of a Rectangular Tessellation. ISVD 2012: 132-137 |
| c100 | | Sudip Roy, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya: Algorithms for On-Chip Solution Preparation Using Digital Microfluidic Biochips. ISVLSI 2012: 7-8 |
| c99 | | Debasis Mitra, Sudip Roy, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On-Chip Sample Preparation with Multiple Dilutions Using Digital Microfluidics. ISVLSI 2012: 314-319 |
| c98 | | Mousumi Dutt, Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: On Finding Shortest Isothetic Path inside a Digital Object. IWCIA 2012: 1-15 |
| 2011 | ||
| j57 | | Hafizur Rahaman, Dipak K. Kole, Debesh K. Das, Bhargab B. Bhattacharya: Fault diagnosis in reversible circuits under missing-gate fault model. Computers & Electrical Engineering 37(4): 475-485 (2011) |
| j56 | | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques. J. Electronic Testing 27(5): 657-671 (2011) |
| j55 | | Mousumi Dutt, Aisharjya Sarkar, Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Efficient Word Segmentation and Baseline Localization in Handwritten Documents Using Isothetic Covers. IJDLS 2(3): 1-13 (2011) |
| j54 | | Mousumi Dutt, Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: On finding an orthogonal convex skull of a digital object. Int. J. Imaging Systems and Technology 21(1): 14-27 (2011) |
| j53 | | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: On the representation of a digital contour with an unordered point set for visual perception. J. Visual Communication and Image Representation 22(7): 590-605 (2011) |
| j52 | | Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Bhargab B. Bhattacharya, Saraju P. Mohanty: A Routing-Aware ILS Design Technique. IEEE Trans. VLSI Syst. 19(12): 2335-2338 (2011) |
| c97 | | Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya: Diagnosis of Multiple Scan-Chain Faults in the Presence of System Logic Defects. Asian Test Symposium 2011: 297-302 |
| c96 | | Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Waste-aware dilution and mixing of biochemical samples with digital microfluidic biochips. DATE 2011: 1059-1064 |
| c95 | | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On residue removal in digital microfluidic biochips. ACM Great Lakes Symposium on VLSI 2011: 391-394 |
| c94 | | Nilanjana Karmakar, Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Construction of 3D Orthogonal Cover of a Digital Object. IWCIA 2011: 70-83 |
| c93 | | Oishila Bandyopadhyay, Bhabatosh Chanda, Bhargab B. Bhattacharya: Entropy-Based Automatic Segmentation of Bones in Digital X-ray Images. PReMI 2011: 122-129 |
| c92 | | Sudip Roy, Bhargab B. Bhattacharya, Partha Pratim Chakrabarti, Krishnendu Chakrabarty: Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip. VLSI Design 2011: 171-176 |
| 2010 | ||
| j51 | | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya: Separating Multi-Color Points on a Plane with Fewest Axis-Parallel Lines. Fundam. Inform. 99(3): 315-324 (2010) |
| j50 | | Debasis Mitra, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sandip Kundu, Ashish Nigam, Sandeep K. Dey: Test pattern generation for droop faults. IET Computers & Digital Techniques 4(4): 274-284 (2010) |
| j49 | | Shyamosree Pal, Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Understanding Digital Documents Using Gestalt Properties of Isothetic Components. IJDLS 1(3): 1-26 (2010) |
| j48 | | Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya: Recognition of largest empty orthoconvex polygon in a point set. Inf. Process. Lett. 110(17): 746-752 (2010) |
| j47 | | Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya: PVT: Unified Reduction of Test Power, Volume, and Test Time Using Double-Tree Scan Architecture. J. Low Power Electronics 6(3): 457-468 (2010) |
| j46 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Construction of isothetic covers of a digital object: A combinatorial approach. J. Visual Communication and Image Representation 21(4): 295-310 (2010) |
| j45 | | Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Optimization of Dilution and Mixing of Biochemical Samples Using Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 29(11): 1696-1708 (2010) |
| c91 | | Dipak K. Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Derivation of Optimal Test Set for Detection of Multiple Missing-Gate Faults in Reversible Circuits. Asian Test Symposium 2010: 33-38 |
| c90 | | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Testing of Digital Microfluidic Biochips Using Improved Eulerization Techniques and the Chinese Postman Problem. Asian Test Symposium 2010: 111-116 |
| c89 | | Sanjoy Pratihar, Shyamosree Pal, Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Recognition of Hand-Drawn Graphs Using Digital-Geometric Techniques. ICFHR 2010: 89-94 |
| c88 | | Aisharjya Sarkar, Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Word Segmentation and Baseline Detection in Handwritten Documents Using Isothetic Covers. ICFHR 2010: 445-450 |
| c87 | | Gopal Paul, Rohit Reddy, Chittaranjan A. Mandal, Bhargab B. Bhattacharya: A BDD-Based Design of an Area-Power Efficient Asynchronous Adder. ISVLSI 2010: 29-34 |
| c86 | | Gopal Paul, Santosh Biswas, Chittaranjan A. Mandal, Bhargab B. Bhattacharya: A BDD-based approach to design power-aware on-line detectors for digital circuits. SoCC 2010: 343-346 |
| c85 | | Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya: A Unified Solution to Scan Test Volume, Time, and Power Minimization. VLSI Design 2010: 9-14 |
| c84 | | Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: A Simple Algorithm for Approximate Partial Point Set Pattern Matching under Rigid Motion. WALCOM 2010: 102-112 |
| 2009 | ||
| j44 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Testable design of AND-EXOR logic networks with universal test sets. Computers & Electrical Engineering 35(5): 644-658 (2009) |
| j43 | | Partha Bhowmick, Bhargab B. Bhattacharya: Real Polygonal Covers of Digital Discs - Some Theories and Experiments. Fundam. Inform. 91(3-4): 487-505 (2009) |
| j42 | | Debasis Mitra, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Droop sensitivity of stuck-at fault tests. IET Computers & Digital Techniques 3(2): 175-193 (2009) |
| j41 | | Partha Bhowmick, R. K. Pradhan, Bhargab B. Bhattacharya: Approximate Matching of Digital Point Sets Using a Novel Angular Tree. IEEE Trans. Pattern Anal. Mach. Intell. 31(5): 769-782 (2009) |
| j40 | | Partha Bhowmick, Bhargab B. Bhattacharya: Removal of digitization errors in fingerprint ridgelines using B-splines. Pattern Recognition 42(3): 465-474 (2009) |
| c83 | | Sahadev Bera, Partha Bhowmick, Bhargab B. Bhattacharya: Detection of Circular Arcs in a Digital Image Using Chord and Sagitta Properties. GREC 2009: 69-80 |
| c82 | | Shyamosree Pal, Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: GOAL: Towards Understanding of Graphic Objects from Architectural to Line Drawings. GREC 2009: 81-92 |
| c81 | | Partha Bhowmick, Sahadev Bera, Bhargab B. Bhattacharya: Digital Circularity and Its Applications. IWCIA 2009: 1-15 |
| c80 | | Arijit Ghosh, Rushin Shah, Arijit Bishnu, Bhargab B. Bhattacharya: Algorithms for Biological Cell Sorting with a Lab-on-a-chip. NaBIC 2009: 104-109 |
| 2008 | ||
| j39 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Archival image indexing with connectivity features using randomized masks. Appl. Soft Comput. 8(4): 1625-1636 (2008) |
| j38 | | Partha Bhowmick, Bhargab B. Bhattacharya: Number-theoretic interpretation and construction of a digital circle. Discrete Applied Mathematics 156(12): 2381-2399 (2008) |
| j37 | | Suman K. Mitra, Malay Kumar Kundu, C. A. Murthy, Bhargab B. Bhattacharya, Tinku Acharya: A New Probabilistic Approach for Fractal Based Image Compression. Fundam. Inform. 87(3-4): 417-433 (2008) |
| j36 | | Indranil Saha, Bhargab B. Bhattacharya, Sheng Zhang, Sharad C. Seth: Planar Straight-Line Embedding of Double-Tree Scan Architecture on a Rectangular Grid. Fundam. Inform. 89(2-3): 331-344 (2008) |
| j35 | | Subhashis Majumder, Bhargab B. Bhattacharya: On the density and discrepancy of a 2D point set with applications to thermal analysis of VLSI chips. Inf. Process. Lett. 107(5): 177-182 (2008) |
| j34 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: An Adaptive BIST Design for Detecting Multiple Stuck-Open Faults in a CMOS Complex Cell. IEEE T. Instrumentation and Measurement 57(12): 2838-2845 (2008) |
| c79 |  | Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya: Recognition of Largest Empty Orthoconvex Polygon in a Point Set. CCCG 2008 |
| c78 | | Arindam Biswas, Suman Khara, Partha Bhowmick, Bhargab B. Bhattacharya: Extraction of regions of interest from face images using cellular analysis. Bangalore Compute Conf. 2008: 15 |
| c77 | | Arindam Biswas, Partha Bhowmick, Moumita Sarkar, Bhargab B. Bhattacharya: Finding the Orthogonal Hull of a Digital Object: A Combinatorial Approach. IWCIA 2008: 124-135 |
| c76 | | Hafizur Rahaman, Dipak K. Kole, Debesh Kumar Das, Bhargab B. Bhattacharya: On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set. VLSI Design 2008: 163-168 |
| 2007 | ||
| j33 | | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay K. Kundu, Arijit Bishnu, Tinku Acharya: A Co-processor for Computing the Euler Number of a Binary Image using Divide-and-Conquer Strategy. Fundam. Inform. 76(1-2): 75-89 (2007) |
| j32 | | Arijit Bishnu, Bhargab B. Bhattacharya: Stacked Euler Vector (SERVE): A Gray-Tone Image Feature Based on Bit-Plane Augmentation. IEEE Trans. Pattern Anal. Mach. Intell. 29(2): 350-355 (2007) |
| j31 | | Partha Bhowmick, Bhargab B. Bhattacharya: Fast Polygonal Approximation of Digital Curves Using Relaxed Straightness Properties. IEEE Trans. Pattern Anal. Mach. Intell. 29(9): 1590-1602 (2007) |
| j30 | | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: An Efficient Scan Tree Design for Compact Test Pattern Set. IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1331-1339 (2007) |
| j29 | | Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Swarup Kumar Das: Hierarchical partitioning of VLSI floorplans by staircases. ACM Trans. Design Autom. Electr. Syst. 12(1) (2007) |
| c75 | | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: ICE: The Isothetic Convex Envelope of a Digital Object. ICCTA 2007: 219-223 |
| c74 | | Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya: A Local Search Heuristic for Biobjective Intersecting Geometric Graphs. ICCTA 2007: 224-230 |
| c73 | | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Ranking of Optical Character Prototypes in a Large Database Using Isothetic Chord Lengths. ICCTA 2007: 422-426 |
| c72 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Characterization of Isothetic Polygons for Image Indexing and Retrieval. ICCTA 2007: 590-594 |
| 2006 | ||
| j28 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability. J. Electronic Testing 22(2): 125-142 (2006) |
| j27 | | Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: Simple algorithms for partial point set pattern matching under rigid motion. Pattern Recognition 39(9): 1662-1671 (2006) |
| c71 | | Gopal Paul, S. N. Pradhan, Ajit Pal, Bhargab B. Bhattacharya: Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. APCCAS 2006: 1504-1507 |
| c70 | | Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya: Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs. GECCO 2006: 1689-1696 |
| c69 | | Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya: On finding the minimum test set of a BDD-based circuit. ACM Great Lakes Symposium on VLSI 2006: 169-172 |
| c68 | | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: PACE: Polygonal Approximation of Thick Digital Curves Using Cellular Envelope. ICVGIP 2006: 299-310 |
| c67 | | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: An Efficient Scan Tree Design for Compact Test Pattern Set. VLSI Design 2006: 175-180 |
| c66 | | Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu: Test Pattern Generation for Power Supply Droop Faults. VLSI Design 2006: 343-348 |
| c65 | | Anirban Lahiri, Saurabh Agarwal, Anupam Basu, Bhargab B. Bhattacharya: Recovery-Based Real-Time Static Scheduling for Battery Life Optimization. VLSI Design 2006: 469-472 |
| c64 | | Subhashis Majumder, Bhargab B. Bhattacharya: Solving Thermal Problems of Hot Chips Using Voronoi Diagrams. VLSI Design 2006: 545-548 |
| 2005 | ||
| j26 | | Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Determination of Minutiae Scores for Fingerprint Image Applications. Int. J. Image Graphics 5(3): 537-572 (2005) |
| j25 | | Arijit Bishnu, Bhargab B. Bhattacharya, Malay K. Kundu, C. A. Murthy, Tinku Acharya: A pipeline architecture for computing the Euler number of a binary image. Journal of Systems Architecture 51(8): 470-487 (2005) |
| j24 | | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Euler vector for search and retrieval of gray-tone images. IEEE Transactions on Systems, Man, and Cybernetics, Part B 35(4): 801-812 (2005) |
| c63 | | Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya: Efficient Test Compaction for Pseudo-Random Testing. Asian Test Symposium 2005: 337-342 |
| c62 | | Debdeep Mukhopadhyay, Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: CryptoScan: A Secured Scan Chain Architecture. Asian Test Symposium 2005: 348-353 |
| c61 | | Subhashis Majumder, Bhargab B. Bhattacharya: Density or Discrepancy: A VLSI Designer's Dilemma in Hot Spot Analysis. CCCG 2005: 167-170 |
| c60 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: MUSC: Multigrid Shape Codes and Their Applications to Image Retrieval. CIS (1) 2005: 1057-1063 |
| c59 | | Partha Bhowmick, Bhargab B. Bhattacharya: Approximation of Digital Circles by Regular Polygons. ICAPR (1) 2005: 257-267 |
| c58 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Reconstruction of torn documents using contour maps. ICIP (3) 2005: 517-520 |
| c57 | | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Isothetic Polygonal Approximations of a 2D Object on Generalized Grid. PReMI 2005: 407-412 |
| c56 | | Piyush K. Bhunre, C. A. Murthy, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu: A Hybrid Data and Space Partitioning Technique for Similarity Queries on Bounded Clusters. PReMI 2005: 544-550 |
| c55 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: TIPS: On Finding a Tight Isothetic Polygonal Shape Covering a 2D Object. SCIA 2005: 930-939 |
| c54 | | Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya: On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design. VLSI Design 2005: 491-496 |
| c53 | | Subhashis Majumder, Susmita Sur-Kolay, Subhas C. Nandy, Bhargab B. Bhattacharya, B. Chakraborty: Hot Spots and Zones in a Chip: A Geometrician's View. VLSI Design 2005: 691-696 |
| 2004 | ||
| j23 | | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya: On Finding A Staircase Channel With Minimum Crossing Nets In A VLSI Floorplan. Journal of Circuits, Systems, and Computers 13(5): 1019-1038 (2004) |
| j22 | | Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell: A New Classification of Path-Delay Fault Testability in Terms of Stuck-at Faults. J. Comput. Sci. Technol. 19(6): 955-964 (2004) |
| j21 | | Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Manhattan-diagonal routing in channels and switchboxes. ACM Trans. Design Autom. Electr. Syst. 9(1): 75-104 (2004) |
| c52 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults. ASP-DAC 2004: 224-229 |
| c51 | | Partha Bhowmick, Bhargab B. Bhattacharya: Approximate Fingerprint Matching Using Kd-Tree. ICPR (1) 2004: 544-547 |
| c50 | | Partha Bhowmick, Bhargab B. Bhattacharya: CODE: An Adaptive Algorithm for Detecting Corners and Directions of Incident Edges. ICVGIP 2004: 509-515 |
| c49 | | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: CONFERM: Connectivity Features with Randomized Masks and Their Applications to Image Indexing. ICVGIP 2004: 556-562 |
| c48 | | Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah: Physical Design Trends and Layout-Based Fault Modeling. VLSI Design 2004: 6-8 |
| c47 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Easily Testable Realization of GRM and ESOP Networks for Detecting Stuck-at and Bridging Faults. VLSI Design 2004: 487-492 |
| 2003 | ||
| j20 | | Subhas C. Nandy, Bhargab B. Bhattacharya: On finding an empty staircase polygon of largest area (width) in a planar point-set. Comput. Geom. 26(2): 143-171 (2003) |
| j19 | | Nabanita Das, Bhargab B. Bhattacharya, Sergei L. Bezrukov: Permutation routing in optical MIN with minimum number of stages. Journal of Systems Architecture 48(11-12): 311-323 (2003) |
| j18 | | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel: Zero-Aliasing Space Compaction of Test Responses Using a Single Periodic Output. IEEE Trans. Computers 52(12): 1646-1651 (2003) |
| c46 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Mapping Symmetric Functions to Hierarchical Modules for Path-Delay Fault Testability. Asian Test Symposium 2003: 284-289 |
| c45 | | Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: An Improved Algorithm for Point Set Pattern Matching under Rigid Motion. CIAC 2003: 36-45 |
| c44 | | Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang: Double-Tree Scan: A Novel Low-Power Scan-Path Architecture. ITC 2003: 470-479 |
| c43 | | Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang: Low-Energy BIST Design for Scan-based Logic Circuits. VLSI Design 2003: 546-551 |
| 2002 | ||
| j17 | | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu: A Simple Architecture for Computing Moments and Orientation of an Image. Fundam. Inform. 52(4): 285-295 (2002) |
| j16 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Circuits Using Transition Count. J. Comput. Sci. Technol. 17(6): 731-737 (2002) |
| j15 | | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors for scan-based sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1171-1179 (2002) |
| j14 | | Parthasarathi Dasgupta, Peichen Pan, Subhas C. Nandy, Bhargab B. Bhattacharya: Monotone bipartitioning problem in a planar point set with applications to VLSI. ACM Trans. Design Autom. Electr. Syst. 7(2): 231-248 (2002) |
| c42 | | Arijit Bishnu, Swarup Bhunia, C. A. Murthy, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya: Content based image retrieval: related issues using Euler vector. ICIP (2) 2002: 585-588 |
| c41 | | Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Determination of Minutiae Scores for Fingerprint Image Applications. ICVGIP 2002 |
| c40 | | Arijit Bishnu, Partha Bhowmick, Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Combinatorial Classification of Pixels for Ridge Extraction in a Gray-Scale Fingerprint Image. ICVGIP 2002 |
| c39 | | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Euler Vector: A Combinatorial Signature for Gray-Tone Images. ITCC 2002: 121-127 |
| c38 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: A New Synthesis of Symmetric Functions. VLSI Design 2002: 160-165 |
| 2001 | ||
| j13 | | Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya: Searching networks with unrestricted edge costs. IEEE Transactions on Systems, Man, and Cybernetics, Part A 31(6): 497-507 (2001) |
| c37 | | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors with application to scan-based IP cores. ASP-DAC 2001: 496-502 |
| c36 | | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: On-chip computation of Euler number of a binary image for efficient database search. ICIP (3) 2001: 310-313 |
| c35 | | Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Subhas C. Nandy: Area(number)-balanced hierarchy of staircase channels with minimum crossing nets. ISCAS (5) 2001: 395-398 |
| c34 | | Suman K. Mitra, C. A. Murthy, Malay Kumar Kundu, Bhargab B. Bhattacharya, Tinku Acharya: Fractal Image Compression Using Iterated Function System with Probabilities. ITCC 2001: 191-195 |
| c33 | | Debesh Kumar Das, Bhargab B. Bhattacharya, Satoshi Ohtake, Hideo Fujiwara: Testable Design of Sequential Circuits with Improved Fault Efficiency. VLSI Design 2001: 128-133 |
| c32 | | Koushik Sinha, Susmita Sur-Kolay, Bhargab B. Bhattacharya, P. S. Dasgupta: Partitioning Routing Area into Zones with Distinct Pins. VLSI Design 2001: 345- |
| c31 | | A. Morozov, Michael Gössel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Design of Parameterizable Error-Propagating Space Compactors for Response Observation. VTS 2001: 48-53 |
| 2000 | ||
| j12 | | Subhas C. Nandy, Bhargab B. Bhattacharya, Antonio Hernández-Barrera: Safety Zone Problem. J. Algorithms 37(2): 538-569 (2000) |
| j11 | | Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya: Isomorph-Redundancy in Sequential Circuits. IEEE Trans. Computers 49(9): 992-997 (2000) |
| j10 | | Susanta Chakrabarti, Sandip Das, Debesh Kumar Das, Bhargab B. Bhattacharya: Synthesis of symmetric functions for path-delay fault testability. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 1076-1081 (2000) |
| c30 | | Swarup Bhunia, Subhashis Majumder, Ayan Sircar, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Topological Routing Amidst Polygonal Obstacles. VLSI Design 2000: 274-279 |
| c29 | | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya: A Fast Algorithm for Computing the Euler Number of an Image and its VLSI Implementation. VLSI Design 2000: 330-335 |
| c28 | | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel: Zero-Aliasing Space Compression using a Single Periodic Output and its Application to Testing of Embedded Cores. VLSI Design 2000: 382-391 |
| 1999 | ||
| c27 | | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: An Adaptive BIST to Detect Multiple Stuck-Open Faults in CMOS circuits. ASP-DAC 1999: 287- |
| c26 | | Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell: A Complete Characterization of Path Delay Faults through Stuck-at Faults. VLSI Design 1999: 492-497 |
| c25 | | Susanta Chakraborty, Sandip Das, Debesh K. Das, Bhargab B. Bhattacharya: Synthesis of Symmetric Functions for Path-Delay Fault Testability. VLSI Design 1999: 512-517 |
| c24 | | Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: High Performance MCM Routing: A New Approach. VLSI Design 1999: 564-569 |
| 1998 | ||
| j9 | | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: A unified approach to topology generation and optimal sizing of floorplans. IEEE Trans. on CAD of Integrated Circuits and Systems 17(2): 126-135 (1998) |
| c23 | | Debesh K. Das, Susanta Chakraborty, Bhargab B. Bhattacharya: Interchangeable Boolean Functions and Their Effects on Redundancy in Logic Circuits. ASP-DAC 1998: 469-474 |
| c22 | | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya: Partitioning VLSI Floorplans by Staircase Channels for Global Routing. VLSI Design 1998: 59-64 |
| c21 | | Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Routing of L-Shaped Channels, Switchboxes and Staircases in Manhattan-Diagonal Model. VLSI Design 1998: 65- |
| c20 | | Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya: Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults. VLSI Design 1998: 205- |
| 1997 | ||
| c19 | | Debesh Kumar Das, Susanta Chakraborty, Bhargab B. Bhattacharya: New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults. VLSI Design 1997: 303-309 |
| 1996 | ||
| c18 | | Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya: Shooter Location Problem. CCCG 1996: 93-98 |
| c17 | | Sandip Das, Bhargab B. Bhattacharya: Channel routing in Manhattan-diagonal model. VLSI Design 1996: 43-48 |
| c16 | | Debesh Kumar Das, Bhargab B. Bhattacharya: Does retiming affect redundancy in sequential circuits? VLSI Design 1996: 260-263 |
| c15 | | Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya: Geometric bipartitioning problem and its applications to VLSI. VLSI Design 1996: 400-405 |
| c14 | | Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya: Isomorph-redundancy in sequential circuits. VTS 1996: 463-469 |
| 1995 | ||
| c13 | | Debesh K. Das, Bhargab B. Bhattacharya: Testable design of non-scan sequential circuits using extra logic. Asian Test Symposium 1995: 176- |
| c12 | | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: A unified approach to topology generation and area optimization of general floorplans. ICCAD 1995: 712-715 |
| c11 | | P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: VLSI floorplan generation and area optimization using AND-OR graph search. VLSI Design 1995: 370-375 |
| 1994 | ||
| j8 | | Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta: Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks. IEEE Trans. Computers 43(12): 1439-1444 (1994) |
| c10 | | Subhas C. Nandy, Arani Sinha, Bhargab B. Bhattacharya: Location of the Largest Empty Rectangle among Arbitrary Obstacles. FSTTCS 1994: 159-170 |
| 1993 | ||
| j7 | | Susanta Chakraborty, Debesh Kumar Das, Bhargab B. Bhattacharya: Logical redundancies in irredundant combinational circuits. J. Electronic Testing 4(2): 125-130 (1993) |
| j6 | | Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta: Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing. IEEE Trans. Computers 42(6): 665-677 (1993) |
| c9 | | Sandip Das, Bhargab B. Bhattacharya: Via Minimization in Channel Routing by Layout Modification. VLSI Design 1993: 109-110 |
| 1992 | ||
| c8 | | Susmita Sur-Kolay, Bhargab B. Bhattacharya: Canonical Embedding of Rectangular Duals with Applications to VLSI Floorplanning. DAC 1992: 69-74 |
| 1991 | ||
| c7 | | Susmita Sur-Kolay, Bhargab B. Bhattacharya: The Cycle Structure of Channel Graphs in Nonslicible Floorplans and A Unified Algorithm for Feasible Routing Order. ICCD 1991: 524-527 |
| c6 | | Subir Bandyopadhyay, Bhargab B. Bhattacharya: On the Testable Design of Bilateral Bit-Level Systolic Arrays. ITC 1991: 1024-1033 |
| 1990 | ||
| c5 | | Subhas C. Nandy, Bhargab B. Bhattacharya, Sibabrata Ray: Efficient algorithms for Identifying All Maximal Isothetic Empty Rectangles in VLSI Layout Design. FSTTCS 1990: 255-269 |
| 1989 | ||
| j5 | | Bhargab B. Bhattacharya, Sharad C. Seth: Design of Parity Testable Combinational Circuits. IEEE Trans. Computers 38(11): 1580-1584 (1989) |
| j4 | | Jitender S. Deogun, Bhargab B. Bhattacharya: Via minimization in VLSI routing with movable terminals. IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 917-920 (1989) |
| 1988 | ||
| c4 | | Susmita Sur-Kolay, Bhargab B. Bhattacharya: Inherent Nonslicibility of Rectangular Duals in VLSI Floorplanning. FSTTCS 1988: 88-107 |
| 1986 | ||
| j3 | | Bhargab B. Bhattacharya, Bidyut Gupta: On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults. IEEE Trans. Computers 35(1): 85-90 (1986) |
| j2 | | Bhabani P. Sinha, Bhargab B. Bhattacharya, Suranjan Ghose, Pradip K. Srimani: A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation. IEEE Trans. Computers 35(11): 1000-1004 (1986) |
| 1985 | ||
| j1 | | Bhabani P. Sinha, Bhargab B. Bhattacharya: On the Numerical Complexity of Short-Circuit Faults in Logic Networks. IEEE Trans. Computers 34(2): 186-190 (1985) |
| 1984 | ||
| c3 | | Bhargab B. Bhattacharya, Suranjan Ghose, Bhabani P. Sinha, Pradip K. Srimani: Heuristic Search Approach to Optimal Routing in a Distributed Architecture. FSTTCS 1984: 152-164 |
| c2 | | Bhargab B. Bhattacharya, Bidyut Gupta: Logical Modeling of Physical Failures and Their Inherent Syndrome Testability in MOS LSI/VLSI Networks. ITC 1984: 847-855 |
| 1983 | ||
| c1 | | Bhargab B. Bhattacharya, Bidyut Gupta: Syndrome Testable Design of Combinational Networks for Detecting Stuck-At and Bridging Faults. ITC 1983: 446-452 |
Colors in the list of coauthors
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