Shuvra S. Bhattacharyya

Dongwon Lee, Marilyn Wolf, Shuvra S. Bhattacharyya: High-performance and low-energy buffer mapping method for multiprocessor DSP systems. ACM Trans. Embedded Comput. Syst. 12(3): 82 (2013)

George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall: Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio. Signal Processing Systems 70(2): 177-191 (2013)

Lai-Huei Wang, Chung-Ching Shen, Shenpei Wu, Shuvra S. Bhattacharyya: Parameterized Scheduling of Topological Patterns in Signal Processing Dataflow Graphs. Signal Processing Systems 71(3): 275-286 (2013)

Chung-Ching Shen, Shenpei Wu, Nimish Sane, Hsiang-Huang Wu, William Plishker, Shuvra S. Bhattacharyya: Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format. IEEE Transactions on Multimedia 14(3-1): 630-640 (2012)

Shuvra S. Bhattacharyya, Wonyong Sung, Jarmo Takala: Guest Editors' Introduction. Signal Processing Systems 66(3): 223-224 (2012)

Hojin Kee, Chung-Ching Shen, Shuvra S. Bhattacharyya, Ian C. Wong, Yong Rao, Jacob Kornerup: Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware. Signal Processing Systems 66(3): 285-301 (2012)

Jarmo Takala, Shuvra S. Bhattacharyya, Wonyong Sung: Guest Editors' Introduction. Signal Processing Systems 69(3): 225-226 (2012)

George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Frank Fruth: Partial Expansion Graphs: Exposing Parallelism and Dynamic Scheduling Opportunities for DSP Applications. ASAP 2012: 86-93

Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya, Joseph R. Cavallaro: GPU-based acceleration of symbol timing recovery. DASIP 2012: 1-8

Shenpei Wu, Chung-Ching Shen, Nimish Sane, Kelly Davis, Shuvra S. Bhattacharyya: Parameterized scheduling for signal processing systems using topological patterns. ICASSP 2012: 1561-1564

Shuvra S. Bhattacharyya: Instrumentation techniques for cyber-physical systems using the targeted dataflow interchange format. ICSAMOS 2012: 363

Lai-Huei Wang, Chung-Ching Shen, Gunasekaran S. Seetharaman, Kannappan Palaniappan, Shuvra S. Bhattacharyya: Multidimensional Dataflow Graph Modeling and Mapping for Efficient GPU Implementation. SiPS 2012: 300-305

William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya: Heterogeneous Design in Functional DIF. T. HiPEAC 4: 391-408 (2011)

Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya: Multithreaded Simulation for Synchronous Dataflow Graphs. ACM Trans. Design Autom. Electr. Syst. 16(3): 25 (2011)

Ruirui Gu, Jörn W. Janneck, Mickaël Raulet, Shuvra S. Bhattacharyya: Exploiting Statically Schedulable Regions in Dataflow Programs. Signal Processing Systems 63(1): 129-142 (2011)

Shuvra S. Bhattacharyya, Johan Eker, Jörn W. Janneck, Christophe Lucarz, Marco Mattavelli, Mickaël Raulet: Overview of the MPEG Reconfigurable Video Coding Framework. Signal Processing Systems 63(2): 251-263 (2011)

Nimish Sane, Hojin Kee, Gunasekaran S. Seetharaman, Shuvra S. Bhattacharyya: Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs. Signal Processing Systems 65(2): 229-244 (2011)

Shuvra S. Bhattacharyya, William Plishker, Nimish Sane, Chung-Ching Shen, Hsiang-Huang Wu: Modeling and optimization of dynamic signal processing in resource-aware sensor networks. AVSS 2011: 449-454

Chung-Ching Shen, Hsiang-Huang Wu, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya: A design tool for efficient mapping of multimedia applications onto heterogeneous platforms. ICME 2011: 1-6

Hsiang-Huang Wu, Chung-Ching Shen, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya: A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs. IPDPS Workshops 2011: 70-81

Inkeun Cho, Chung-Ching Shen, Siddharth Potbhare, Shuvra S. Bhattacharyya, Neil Goldsman: Design methods for Wireless Sensor Network Building Energy Monitoring Systems. LCN 2011: 974-981

William Plishker, George F. Zaki, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall: Applying graphics processor acceleration in a software defined radio prototyping environment. International Symposium on Rapid System Prototyping 2011: 67-73

Shuvra S. Bhattacharyya: Methods for design and implementation of dynamic signal processing systems. ICSAMOS 2011

George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall: Vectorization and mapping of software defined radio applications on heterogeneous multi-processor platforms. SiPS 2011: 31-36

Sankalita Saha, Neal K. Bambha, Shuvra S. Bhattacharyya: Design and implementation of embedded computer vision systems based on particle filters. Computer Vision and Image Understanding 114(11): 1203-1214 (2010)

Joachim Falk, Christian Zebelein, Joachim Keinert, Christian Haubelt, Jürgen Teich, Shuvra S. Bhattacharyya: Analysis of SystemC actor networks for efficient synthesis. ACM Trans. Embedded Comput. Syst. 10(2): 18 (2010)

Chung-Ching Shen, William Plishker, Dong-Ik Ko, Shuvra S. Bhattacharyya, Neil Goldsman: Energy-driven distribution of signal processing applications across wireless sensor networks. TOSN 6(3) (2010)

Jani Boutellier, Shuvra S. Bhattacharyya, Olli Silvén: A Low-overhead Scheduling Methodology for Fine-grained Acceleration of Signal Processing Systems. Signal Processing Systems 60(3): 333-343 (2010)

Ruirui Gu, Shuvra S. Bhattacharyya, William S. Levine: Methods for Efficient Implementation of Model Predictive Control on Multiprocessor Systems. CCA 2010: 1357-1362

Jonathan Piat, Shuvra S. Bhattacharyya, Mickaël Raulet: Loop transformations for interface-based hierarchies IN SDF graphs. ASAP 2010: 341-344

Ruirui Gu, Jonathan Piat, Mickaël Raulet, Jörn W. Janneck, Shuvra S. Bhattacharyya: Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementation. DASIP 2010: 265-272

Hojin Kee, Shuvra S. Bhattacharyya, Ian C. Wong, Yong Rao: FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques. ICASSP 2010: 1510-1513

Nimish Sane, Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya: Simulating dynamic communication systems using the core functional dataflow model. ICASSP 2010: 1538-1541

Dong-Ik Ko, Nara Won, Shuvra S. Bhattacharyya: Buffer management for multi-application image processing on multi-core platforms: Analysis and case study. ICASSP 2010: 1662-1665

Hsiang-Huang Wu, Hojin Kee, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya: Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs. International Symposium on Rapid System Prototyping 2010: 1-7

Hojin Kee, Shuvra S. Bhattacharyya, Jacob Kornerup: Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs. ICSAMOS 2010: 136-143

Sankalita Saha, Vida Kianzad, Jason Schlessman, Gaurav Aggarwal, Shuvra S. Bhattacharyya, Rama Chellappa, Wayne Wolf: An architectural level design methodology for smart camera applications. IJES 4(1): 83-97 (2009)

Ruirui Gu, Jörn W. Janneck, Shuvra S. Bhattacharyya, Mickaël Raulet, Matthieu Wipliez, William Plishker: Exploring the Concurrency of an MPEG RVC Decoder Based on Dataflow Program Analysis. IEEE Trans. Circuits Syst. Video Techn. 19(11): 1646-1657 (2009)

Yen-Kuang Chen, Lurng-Kuo Liu, Shuvra S. Bhattacharyya: Guest Editorial: Special Issue on Multi-Core Enabled Multimedia Applications & Architectures. Signal Processing Systems 57(2): 121-122 (2009)

Ruirui Gu, Shuvra S. Bhattacharyya, William S. Levine: Improving the performance of active set based Model Predictive Controls by dataflow methods. CDC 2009: 339-344

William Plishker, Nimish Sane, Shuvra S. Bhattacharyya: Mode grouping for more effective generalized scheduling of dynamic dataflow applications. DAC 2009: 923-926

William Plishker, Nimish Sane, Shuvra S. Bhattacharyya: A generalized scheduling approach for dynamic dataflow applications. DATE 2009: 111-116

Ruirui Gu, Jörn W. Janneck, Mickaël Raulet, Shuvra S. Bhattacharyya: Exploiting statically schedulable regions in dataflow programs. ICASSP 2009: 565-568

Dongwon Lee, Shuvra S. Bhattacharyya, Wayne Wolf: High-Performance Buffer Mapping to Exploit DRAM Concurrency in Multiprocessor DSP Systems. IEEE International Workshop on Rapid System Prototyping 2009: 137-144

Jonathan Piat, Shuvra S. Bhattacharyya, Mickaël Raulet: Interface-based hierarchy for synchronous data-flow graphs. SiPS 2009: 145-150

Omkar Dandekar, William Plishker, Shuvra S. Bhattacharyya, Raj Shekhar: Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration. Int. J. Reconfig. Comp. 2008 (2008)

Mainak Sen, Yashwanth Hemaraj, William Plishker, Raj Shekhar, Shuvra S. Bhattacharyya: Model-based mapping of reconfigurable image registration on FPGA platforms. J. Real-Time Image Processing 3(3): 149-162 (2008)

Shuvra S. Bhattacharyya, Gordon J. Brebner, Jörn W. Janneck, Johan Eker, Carl von Platen, Marco Mattavelli, Mickaël Raulet: OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems. SIGARCH Computer Architecture News 36(5): 29-35 (2008)

Shuvra S. Bhattacharyya, Jarmo Takala, Georgi Gaydadjiev: Introduction to the Special Issue on Embedded Computing Systems for DSP. Signal Processing Systems 50(2): 97-98 (2008)

Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya: Memory-constrained Block Processing for DSP Software Optimization. Signal Processing Systems 50(2): 163-177 (2008)

Chia-Jui Hsu, José Luis Pino, Shuvra S. Bhattacharyya: Multithreaded simulation for synchronous dataflow graphs. DAC 2008: 331-336

Sankalita Saha, Jason Schlessman, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Wayne Wolf: An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications. DATE 2008: 1220-1225

Joachim Falk, Joachim Keinert, Christian Haubelt, Jürgen Teich, Shuvra S. Bhattacharyya: A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications. EMSOFT 2008: 189-198

Omkar Dandekar, William Plishker, Shuvra S. Bhattacharyya, Raj Shekhar: Multiobjective Optimization of FPGA-Based Medical Image Registration. FCCM 2008: 183-192

Hojin Kee, Newton Petersen, Jacob Kornerup, Shuvra S. Bhattacharyya: Systematic generation of FPGA-based FFT implementations. ICASSP 2008: 1413-1416

Sankalita Saha, Neal K. Bambha, Shuvra S. Bhattacharyya: Parameterized design framework for hardware implementation of particle filters. ICASSP 2008: 1449-1452

Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya: Design and optimization of a distributed, embedded speech recognition system. IPDPS 2008: 1-8

William Plishker, Nimish Sane, Mary Kiemb, Kapil Anand, Shuvra S. Bhattacharyya: Functional DIF for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping 2008: 17-23

William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya: Heterogeneous Design in Functional DIF. SAMOS 2008: 157-166

Shuvra S. Bhattacharyya, Xingshe Zhou, Bing Guo, Zili Shao, Xiangke Liao (Eds.): International Conference on Embedded Software and Systems, ICESS '08, Chengdu, Sichuan, China, July 29-31, 2008. IEEE 2008, isbn 978-0-7695-3287-5

Mainak Sen, Ivan Corretjer, Fiorella Haim, Sankalita Saha, Jason Schlessman, Tiehan Lv, Shuvra S. Bhattacharyya, Wayne Wolf: Dataflow-Based Mapping of Computer Vision Algorithms onto FPGAs. EURASIP J. Emb. Sys. 2007 (2007)

Jarmo Takala, Shuvra S. Bhattacharyya, Gang Qu: Embedded Digital Signal Processing Systems. EURASIP J. Emb. Sys. 2007 (2007)

Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya: Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls. ACM Trans. Embedded Comput. Syst. 6(2) (2007)

Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya: Probabilistic design of multimedia embedded systems. ACM Trans. Embedded Comput. Syst. 6(3) (2007)

Chia-Jui Hsu, Ming-Yung Ko, Shuvra S. Bhattacharyya, Suren Ramasubbu, José Luis Pino: Efficient simulation of critical synchronous dataflow graphs. ACM Trans. Design Autom. Electr. Syst. 12(3) (2007)

Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Bart Kienhuis, Ed F. Deprettere: Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing 55(6-2): 3126-3138 (2007)

Chung-Ching Shen, Roni Kupershtok, Shuvra S. Bhattacharyya, Neil Goldsman: Design Techniques for Streamlined Integration and Fault Tolerance in a Distributed Sensor System for Line-crossing Recognition. ICCCN 2007: 1339-1344

Chung-Ching Shen, Roni Kupershtok, Bo Yang, Felice Maria Vanin, Xi Shao, Datta Sheth, Neil Goldsman, Quirino Balzano, Shuvra S. Bhattacharyya: Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition. ISCAS 2007: 2506-2509

Chung-Ching Shen, William Plishker, Shuvra S. Bhattacharyya, Neil Goldsman: An Energy-Driven Design Methodology for Distributing DSP Applications across Wireless Sensor Networks. RTSS 2007: 214-226

Jani Boutellier, Shuvra S. Bhattacharyya, Olli Silvén: Low-Overhead Run-Time Scheduling for Fine-Grained Acceleration of Signal Processing Systems. SiPS 2007: 457-462

Perttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala: Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations. SiPS 2007: 475-480

Markus Rupp, Bernhard Wess, Shuvra S. Bhattacharyya: Design Methods for DSP Systems. EURASIP J. Adv. Sig. Proc. 2006 (2006)

Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya: Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages. ACM Trans. Embedded Comput. Syst. 5(2): 321-341 (2006)

Vida Kianzad, Shuvra S. Bhattacharyya: Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 17(7): 667-680 (2006)

Mukul Khandelia, Neal K. Bambha, Shuvra S. Bhattacharyya: Contention-conscious transaction ordering in multiprocessor DSP systems. IEEE Transactions on Signal Processing 54(2): 556-569 (2006)

Jürgen Teich, Shuvra S. Bhattacharyya: Analysis of Dataflow Programs with Interval-limited Data-rates. VLSI Signal Processing 43(2-3): 247-258 (2006)

Ed F. Deprettere, Todor Stefanov, Shuvra S. Bhattacharyya, Mainak Sen: Affine Nested Loop Programs and their Binary Parameterized Dataflow Graph Counterparts. ASAP 2006: 186-190

Dong-Ik Ko, Shuvra S. Bhattacharyya: The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications. CODES+ISSS 2006: 52-57

Chia-Jui Hsu, Suren Ramasubbu, Ming-Yung Ko, José Luis Pino, Shuvra S. Bhattacharyya: Efficient simulation of critical synchronous dataflow graphs. DAC 2006: 893-898

Sankalita Saha, Shuvra S. Bhattacharyya, Wayne Wolf: A Communication Interface for Multiprocessor Signal Processing Systems. ESTImedia 2006: 127-132

Sankalita Saha, Chung-Ching Shen, Chia-Jui Hsu, Gaurav Aggarwal, Ashok Veeraraghavan, Alan Sussman, Shuvra S. Bhattacharyya: Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System. ICPP Workshops 2006: 66-73

Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya: Memory-constrained Block Processing Optimization for Synthesis of DSP Software. ICSAMOS 2006: 137-143

Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman: Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks. SAMOS 2006: 142-154

Ivan Corretjer, Chia-Jui Hsu, Shuvra S. Bhattacharyya: Configuration and Representation of Large-Scale Dataflow Graphs using the Dataflow Interchange Format. SiPS 2006: 10-15

Neal K. Bambha, Shuvra S. Bhattacharyya: Joint Application Mapping/Interconnect Synthesis Techniques for Embedded Chip-Scale Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 16(2): 99-112 (2005)

Michael J. Schulte, Shuvra S. Bhattacharyya, Robert Schreiber: Guest Editorial. VLSI Signal Processing 40(1): 5-6 (2005)

Dong-Ik Ko, Shuvra S. Bhattacharyya: Modeling of Block-Based DSP Systems. VLSI Signal Processing 40(3): 289-299 (2005)

Vida Kianzad, Shuvra S. Bhattacharyya, Gang Qu: CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems. ASAP 2005: 191-197

Vida Kianzad, Sankalita Saha, Jason Schlessman, Gaurav Aggarwal, Shuvra S. Bhattacharyya, Wayne Wolf, Rama Chellappa: An architectural level design methodology for embedded face detection. CODES+ISSS 2005: 136-141

Neal K. Bambha, Shuvra S. Bhattacharyya: Communication strategies for shared-bus embedded multiprocessors. EMSOFT 2005: 21-24

Jason Schlessman, Sankalita Saha, Wayne Wolf, Shuvra S. Bhattacharyya: An Extended Motion-Estimation Architecture Applied to Shape Recognition. ICME 2005: 1504-1507

Chia-Jui Hsu, Shuvra S. Bhattacharyya: Porting DSP Applications across Design Tools Using the Dataflow Interchange Format. IEEE International Workshop on Rapid System Prototyping 2005: 40-46

Chia-Jui Hsu, Shuvra S. Bhattacharyya: Software Synthesis from the Dataflow Interchange Format. SCOPES 2005: 37-49

Sean Leventhal, Lin Yuan, Neal K. Bambha, Shuvra S. Bhattacharyya, Gang Qu: DSP Address Optimization Using Evolutionary Algorithms. SCOPES 2005: 91-98

Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler: Systematic integration of parameterized local search into evolutionary algorithms. IEEE Trans. Evolutionary Computation 8(2): 137-155 (2004)

Praveen K. Murthy, Shuvra S. Bhattacharyya: Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications. ACM Trans. Design Autom. Electr. Syst. 9(2): 212-237 (2004)

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu: The hierarchical timing pair model for multirate DSP applications. IEEE Transactions on Signal Processing 52(5): 1209-1217 (2004)

Shuvra S. Bhattacharyya, Praveen K. Murthy: The CBP Parameter: A Module Characterization Approach for DSP Software Optimization. VLSI Signal Processing 38(2): 131-146 (2004)

Vida Kianzad, Shuvra S. Bhattacharyya: CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems. ASAP 2004: 28-40

Ankush Varma, Shuvra S. Bhattacharyya: Java-through-C Compilation: An Enabling Technology for Java in Embedded Systems. DATE 2004: 161-167

Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler: Systematic Integration of Parameterized Local Search Techniques in Evolutionary Algorithms. GECCO (2) 2004: 383-384

Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya: DIF: An Interchange Format for Dataflow-Based Design Tools. SAMOS 2004: 423-432

Jürgen Teich, Shuvra S. Bhattacharyya: Analysis of Dataflow Programs with Interval-Limited Data-Rates. SAMOS 2004: 507-518

Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya: Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition. SCOPES 2004: 47-61

Jörg Henkel, Xiaobo Hu, Shuvra S. Bhattacharyya: Guest Editors' Introduction: Taking on the Embedded System Design Challenge. IEEE Computer 36(4): 35-37 (2003)

Magdy Bayoumi, Shuvra S. Bhattacharyya, Rudy Lauwereins: Editorial. EURASIP J. Adv. Sig. Proc. 2003(6): 491-493 (2003)

Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima: Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems. EURASIP J. Adv. Sig. Proc. 2003(6): 565-579 (2003)

Bruce L. Jacob, Shuvra S. Bhattacharyya: Introduction to the two special issues on memory. ACM Trans. Embedded Comput. Syst. 2(1): 1-4 (2003)

Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima: Logic foundry: rapid prototyping of FPGA-based DSP systems. ASP-DAC 2003: 374-381

Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya: Energy reduction techniques for multimedia applications with tolerance to deadline misses. DAC 2003: 131-136

Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya: Energy-Efficient Multi-processor Implementation of Embedded Software. EMSOFT 2003: 257-273

Neal K. Bambha, Shuvra S. Bhattacharyya, Gary Euliss: Design Considerations for Optically Connected Systems on Chip. IWSOC 2003: 299-303

Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya: Exploring the Probabilistic Design Space of Multimedia Systems. IEEE International Workshop on Rapid System Prototyping 2003: 233-

Ming-Yung Ko, Shuvra S. Bhattacharyya: Partitioning for DSP Software Synthesis. SCOPES 2003: 344-358

Neal K. Bambha, Vida Kianzad, Mukul Khandelia, Shuvra S. Bhattacharyya: Intermediate Representations for Design Automation of Multiprocessor DSP Systems. Design Autom. for Emb. Sys. 7(4): 307-323 (2002)

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu: High-Level Synthesis of DSP Applications Using Adaptive Negative Cycle Detection. EURASIP J. Adv. Sig. Proc. 2002(9): 893-907 (2002)

Bruce L. Jacob, Shuvra S. Bhattacharyya: Introduction to the two special issues on memory. ACM Trans. Embedded Comput. Syst. 1(1): 2-5 (2002)

Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima: A Component Architecture for FPGA-Based, DSP System Design. ASAP 2002: 41-

Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya: Consistency Analysis of Reconfigurable Dataflow Specifications. Embedded Processor Design Challenges 2002: 1-17

Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne Wolf, Ahmed Amine Jerraya (Eds.): Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002. ACM 2002, isbn 1-58113-575-0

Praveen K. Murthy, Shuvra S. Bhattacharyya: Shared buffer implementations of signal processing systems usinglifetime analysis techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 177-198 (2001)

Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya: Parameterized dataflow modeling for DSP systems. IEEE Transactions on Signal Processing 49(10): 2408-2421 (2001)

Neal K. Bambha, Shuvra S. Bhattacharyya, Jürgen Teich, Eckart Zitzler: Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors. CODES 2001: 243-248

Vida Kianzad, Shuvra S. Bhattacharyya: Multiprocessor Clustering for Embedded Systems. Euro-Par 2001: 697-701

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu: Adaptive negative cycle detection in dynamic graphs. ISCAS (5) 2001: 163-166

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu: The hierarchical timing pair model. ISCAS (5) 2001: 367-370

Eckart Zitzler, Jürgen Teich, Shuvra S. Bhattacharyya: Evolutionary algorithms for the synthesis of embedded software. IEEE Trans. VLSI Syst. 8(4): 452-455 (2000)

Eckart Zitzler, Jürgen Teich, Shuvra S. Bhattacharyya: Multidimensional Exploration of Software Implementations for DSP Algorithms. VLSI Signal Processing 24(1): 83-98 (2000)

Mukul Khandelia, Shuvra S. Bhattacharyya: Contention-Conscious Transaction Ordering in Embedded Multiprocessors. ASAP 2000: 276-

Praveen K. Murthy, Shuvra S. Bhattacharyya: Shared Memory Implementations of Synchronous Dataflow Specifications. DATE 2000: 404-410

Neal K. Bambha, Shuvra S. Bhattacharyya: A Joint Power/Performance Optimization Algorithm for Multiprocessor Systems using a Period Graph Construct. ISSS 2000: 91-99

Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya: Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems. IEEE International Workshop on Rapid System Prototyping 2000: 84-89

Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee: Synthesis of Embedded Software from Synchronous Dataflow Specifications. VLSI Signal Processing 21(2): 151-166 (1999)

Jürgen Teich, Eckart Zitzler, Shuvra S. Bhattacharyya: 3D exploration of software schedules for DSP algorithms. CODES 1999: 168-172

Praveen K. Murthy, Shuvra S. Bhattacharyya: A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications. ISSS 1999: 78-84

Jürgen Teich, Eckart Zitzler, Shuvra S. Bhattacharyya: Buffer Memory Optimization in DSP Applications - An Evolutionary Approach. PPSN 1998: 885-896

Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee: APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations. Design Autom. for Emb. Sys. 2(1): 33-60 (1997)

Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee: Joint Minimization of Code and Data for Synchronous Dataflow Programs. Formal Methods in System Design 11(1): 41-70 (1997)

Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee: Optimizing synchronization in multiprocessor DSP systems. IEEE Transactions on Signal Processing 45(6): 1605-1618 (1997)

Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee: Optimized software synthesis for synchronous dataflow. ASAP 1997: 250-262

Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee: Latency-constrained Resynchronization for Multiprocessor DSP Implementation. ASAP 1996: 365-380

Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee: Self-Timed Resynchronization: A Post-Optimization for Static Multiprocessor Schedules. IPPS 1996: 199-205

Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee: Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems. ASAP 1995: 298-309

Shuvra S. Bhattacharyya, Edward A. Lee: Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms. Formal Methods in System Design 5(3): 183-205 (1994)

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